Comment 34 for bug 153188

Revision history for this message
Amit Kucheria (amitk) wrote :

I have only updated my kernel to 2.6.25-5 from Intrepid. All the userspace is still Hardy and my X fails.

Booting back into the Hardy kernel brings X back up. Diff'ing the Xorg.log gives the following. I will attached both Xorg.logs

amit@k2 - (~) $ diff -u Xorg.0.log.old Xorg.0.log
--- Xorg.0.log.old 2008-08-03 01:28:40.000000000 +0300
+++ Xorg.0.log 2008-08-03 01:32:29.000000000 +0300
@@ -11,7 +11,7 @@
 Release Date: 5 September 2007
 X Protocol Version 11, Revision 0
 Build Operating System: Linux Ubuntu (xorg-server 2:1.4.1~git20080131-1ubuntu9.2)
-Current Operating System: Linux k2 2.6.26-5-generic #1 SMP Sat Jul 26 21:35:46 UTC 2008 i686
+Current Operating System: Linux k2 2.6.24-20-generic #1 SMP Mon Jul 28 13:49:52 UTC 2008 i686
 Build Date: 13 June 2008 01:08:21AM

  Before reporting problems, check http://wiki.x.org
@@ -20,7 +20,7 @@
 Markers: (--) probed, (**) from config file, (==) default setting,
  (++) from command line, (!!) notice, (II) informational,
  (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
-(==) Log file: "/var/log/Xorg.0.log", Time: Sun Aug 3 01:21:08 2008
+(==) Log file: "/var/log/Xorg.0.log", Time: Sun Aug 3 01:24:38 2008
 (==) Using config file: "/etc/X11/xorg.conf"
 (==) ServerLayout "Default Layout"
 (**) |-->Screen "Default Screen" (0)
@@ -531,9 +531,9 @@
 (II) Loading sub module "ramdac"
 (II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
 (II) intel(0): Comparing regs from server start up to After PreInit
-(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000202 to 0x00000242
-(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS
-(WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS LBLC_EVENT_STATUS VBLANK_INT_STATUS
+(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000202 to 0x80000242
+(WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS
+(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS VBLANK_INT_STATUS
 (==) Depth 24 pixmap format is 32 bpp
 (II) do I need RAC? No, I don't.
 (II) resource ranges after preInit:
@@ -666,7 +666,7 @@
 (II) intel(0): Display plane B is now enabled and connected to pipe B.
 (II) intel(0): Output VGA is connected to pipe none
 (II) intel(0): Output LVDS is connected to pipe B
-(II) intel(0): [drm] dma control initialized, using IRQ 16
+(II) intel(0): [drm] dma control initialized, using IRQ 20
 (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
 (II) intel(0): DPMS enabled
 (II) intel(0): Set up overlay video