Comment 2 for bug 1166364

Revision history for this message
Leif Lindholm (leif-lindholm) wrote : Re: VExpress 4xA9 support not bindings compliant

I have attached a patch that explicitly disables the L2 cache on boot, but I have observed issues with it that would need to be tracked down if not resolved by the below:.

Additionally, I think UEFI should also assert L2BYPASS in the init code, ensuring the PL310 is completely disabled.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0448g/CHDJFEJC.html documents how this can be done in CFGRW1.