ERC no longer works with hidden power pins
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
KiCad |
Fix Committed
|
Medium
|
Jon Evans |
Bug Description
After upgrading KiCad today (my previous update had been last week or the week before, I believe) eeschema's ERC no longer works the way it had been with hidden power/ground pins on my components. The same schematics which passed ERC last week, now show hundreds of errors.
I have many, many schematics affected by this problem, but an example of a schematic that was error free last Friday but error-ridden today (Monday) is here: https:/
(I don't know if it makes any difference, but the schematic is structured as follows, in so far as power and ground are concerned. There are two sheets, tied together by a parent sheet. There are 3 power/ground buses, called FAP, 0VDCA, and +4SW. Each of these buses has a single PWR_FLAG, located on the parent sheet. All of the components with hidden FAP, 0VDCA, and +4SW pins are on the two child sheets.)
Application: kicad
Version: 5.1.0-unknown-
Libraries:
wxWidgets 3.0.2
libcurl/7.47.0 OpenSSL/1.0.2g zlib/1.2.11 libidn/1.32 librtmp/2.3
Platform: Linux 4.4.0-53-generic x86_64, 64 bit, Little endian, wxGTK
Build Info:
wxWidgets: 3.0.2 (wchar_t,wx containers,
Boost: 1.58.0
OpenCASCADE Community Edition: 6.8.0
Curl: 7.47.0
Compiler: GCC 5.4.0 with C++ ABI 1009
Build settings:
USE_
USE_
KICAD_
KICAD_
KICAD_
KICAD_
KICAD_
KICAD_
BUILD_
KICAD_
KICAD_
KICAD_SPICE=ON
Changed in kicad: | |
status: | Fix Committed → Won't Fix |
status: | Won't Fix → Confirmed |
Changed in kicad: | |
status: | In Progress → Fix Committed |
As an afterthought, it occurred to me to wonder if the netlists are affected by the same problem. They are not. A netlist generated today is identical to the one generated last week, and indicates that the hidden power/ground pins are connected correctly.