[Impact]
WD19TB would report the number of lane(2-lane) and it works well on Type-C port of TGL platform.
Change the LTTPR mode to non-transparent mode, WD19TB would report the larger number of lane(4-lane). It's over the type-c port's bandwidth.
[Fix]
The patch is provided by Imre(https://patchwork.freedesktop.org/series/86267/).
Calculate the PBN divider value based on the rate and lane count link parameters
that the driver uses for all other computation.
[Test Case]
1. Connected the WD19TB with the TGL platform's Type-C port and
connected the external monitor on WD19TB with HDMI/Displayport.
2. Cold boot the TGL platform.
4. Check the monitor can be blinked and the video can output to the monitor.
[Where problems could occur]
It's more reasonable to calculate the PBN divider based on the source's rate and lane count,
not the mst's capability.
[Impact]
WD19TB would report the number of lane(2-lane) and it works well on Type-C port of TGL platform.
Change the LTTPR mode to non-transparent mode, WD19TB would report the larger number of lane(4-lane). It's over the type-c port's bandwidth.
[Fix] /patchwork. freedesktop. org/series/ 86267/).
The patch is provided by Imre(https:/
Calculate the PBN divider value based on the rate and lane count link parameters
that the driver uses for all other computation.
[Test Case]
1. Connected the WD19TB with the TGL platform's Type-C port and
connected the external monitor on WD19TB with HDMI/Displayport.
2. Cold boot the TGL platform.
4. Check the monitor can be blinked and the video can output to the monitor.
[Where problems could occur]
It's more reasonable to calculate the PBN divider based on the source's rate and lane count,
not the mst's capability.