Comment 83 for bug 1768976

Revision history for this message
Doug Smythies (dsmythies) wrote :

There is only one PLL (Phase Locked Loop) in the processor, all CPUs get the resulting clock. When they go into deep idle states (deeper than C1, at least for my processor) then they give up their vote into the PLL as to what the frequency should be. Your single 100% task is dedicating the CPU frequency for all, for when they are active.