Linus merged the patch into the upstream kernel, and Greg picked it up for 3.3 stable. Hopefully should be landing in a distro near you. :)
Marking fixed. If upgrading kernels is inconvenient, you can also apply the workaround manually via "sudo intel_reg_write 0x2120 0x1206800", or by disabling HiZ and separate stencil (export hiz=false). (The kernel patch does the register write, so the intel_reg_write workaround is just as good.)
drm/i915: Set the Stencil Cache eviction policy to non-LRA mode.
Clearing bit 5 of CACHE_MODE_0 is necessary to prevent GPU hangs in
OpenGL programs such as Google MapsGL, Google Earth, and gzdoom when
using separate stencil buffers. Without it, the GPU tries to use the
LRA eviction policy, which isn't supported. This was supposed to be off
by default, but seems to be on for many machines.
This cannot be done in gen6_init_clock_gating with most of the other
workaround bits; the render ring needs to exist. Otherwise, the
register write gets dropped on the floor (one printk will show it
changed, but a second printk immediately following shows the value
reverts to the old one).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47535
Cc: <email address hidden>
Cc: Rob Castle <email address hidden>
Cc: Eric Appleman <email address hidden>
Cc: <email address hidden>
Cc: Keith Packard <email address hidden>
Signed-off-by: Kenneth Graunke <email address hidden>
Reviewed-by: Daniel Vetter <email address hidden>
Acked-by: Daniel Vetter <email address hidden>
Signed-off-by: Dave Airlie <email address hidden>
Linus merged the patch into the upstream kernel, and Greg picked it up for 3.3 stable. Hopefully should be landing in a distro near you. :)
Marking fixed. If upgrading kernels is inconvenient, you can also apply the workaround manually via "sudo intel_reg_write 0x2120 0x1206800", or by disabling HiZ and separate stencil (export hiz=false). (The kernel patch does the register write, so the intel_reg_write workaround is just as good.)
commit 3a69ddd6f872180 b6f61fda87152b3 7202118fbc
Author: Kenneth Graunke <email address hidden>
Date: Fri Apr 27 12:44:41 2012 -0700
drm/i915: Set the Stencil Cache eviction policy to non-LRA mode.
Clearing bit 5 of CACHE_MODE_0 is necessary to prevent GPU hangs in
OpenGL programs such as Google MapsGL, Google Earth, and gzdoom when
using separate stencil buffers. Without it, the GPU tries to use the
LRA eviction policy, which isn't supported. This was supposed to be off
by default, but seems to be on for many machines.
This cannot be done in gen6_init_ clock_gating with most of the other
workaround bits; the render ring needs to exist. Otherwise, the
register write gets dropped on the floor (one printk will show it
changed, but a second printk immediately following shows the value
reverts to the old one).
Bugzilla: https:/ /bugs.freedeskt op.org/ show_bug. cgi?id= 47535
Cc: <email address hidden>
Cc: Rob Castle <email address hidden>
Cc: Eric Appleman <email address hidden>
Cc: <email address hidden>
Cc: Keith Packard <email address hidden>
Signed-off-by: Kenneth Graunke <email address hidden>
Reviewed-by: Daniel Vetter <email address hidden>
Acked-by: Daniel Vetter <email address hidden>
Signed-off-by: Dave Airlie <email address hidden>