Upstream (xf86-video-intel) bug was just closed fixed:
--- Comment #120 from Chris Wilson <email address hidden> 2010-12-30 08:11:43 PST ---
After applying
commit 15056d2c06862627ead868e035fcacc59dce1b1a
Author: Chris Wilson <email address hidden>
Date: Tue Dec 21 17:04:23 2010 +0000
drm/i915: Flush pending writes on i830/i845 after updating GTT
There is an erratum on these two chipsets that causes the wrong PTE
entries to be invalidate after updating the GTT and when used from the
BLT engine. The workaround is to flush any pending writes before those
PTEs are used by the BLT.
Signed-off-by: Chris Wilson <email address hidden>
this reduces to the general i8xx incoherency, bug 27187. For which I have a
patch which appears to work on my i845; passing both the wtf test and Daniel's
cache-coherency checker!
Upstream (xf86-video-intel) bug was just closed fixed:
--- Comment #120 from Chris Wilson <email address hidden> 2010-12-30 08:11:43 PST ---
After applying
commit 15056d2c0686262 7ead868e035fcac c59dce1b1a
Author: Chris Wilson <email address hidden>
Date: Tue Dec 21 17:04:23 2010 +0000
drm/i915: Flush pending writes on i830/i845 after updating GTT
There is an erratum on these two chipsets that causes the wrong PTE
entries to be invalidate after updating the GTT and when used from the
BLT engine. The workaround is to flush any pending writes before those
PTEs are used by the BLT.
Signed-off-by: Chris Wilson <email address hidden>
this reduces to the general i8xx incoherency, bug 27187. For which I have a
patch which appears to work on my i845; passing both the wtf test and Daniel's
cache-coherency checker!