Comment 29 for bug 157213

Revision history for this message
In , Hong-liu (hong-liu) wrote :

(In reply to comment #22)
> Created an attachment (id=13891) [details]
> xrandr --verbose, ddcprobe, xorg.conf, and modedebug run
>
> Unchanged with patch applied to git HEAD.
>
> commit db0a7c569e383436a2725e1e74f35fb426da1196
> Author: Andreas Stawinoga <email address hidden>
> Date: Thu Jan 24 08:51:09 2008 +0800
>

It's weird that your log doesn't change with patch applied.

(II) intel(0): DPLL_B: 0x90046000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
              p2 should be 7 after patch applied

(II) intel(0): pipe A dot 50307 n 2 m1 18 m2 7 p1 13 p2 4
(II) intel(0): pipe B dot 122857 n 3 m1 22 m2 7 p1 3 p2 7
               the dot is wrong because we are using the 96M/100M ref clock which only available on i9XX platform. After patch, we should use 48M/66M ref clock.

(II) intel(0): Modeline "1280x768"x0.0 40.54 1280 1328 1440 1688 768 771 777 806 (24.0 kHz)
 the dotclock should be changed to 80.09MHz.

Would you please recheck the patch is applied, thanks.

Can you try the following mode by xrandr to see if it works?
Modeline "1280x768"x0.0 80.09 1280 1328 1440 1688 768 771 777 806

Thanks,
Hong