Ubuntu
xserver-xorg-video-intel package

  1. Bug #1401788
  2. Comment #78

Comment 78 for bug 1401788

Revision history for this message
In , Chris Wilson (ickle) wrote :

commit 3a22b6f6d55a5b1e0a1c0a3d597996268ed439ad
Author: Mika Kuoppala <email address hidden>
Date: Wed Nov 19 15:10:05 2014 +0200

    sna: gen8 BLT broken when address has bit 4 set

    With bit 4 set in address, the gen8 blitter fails and blits errorneously
    into the cacheline preceeding the destination and similarly when reading fro
    the source, corrupting memory.

    v2: Update the destination base offset pattern as revealed
        by igt/tests/gem_userptr_blits/destination-bo-align

    v3: Check base address as well

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79053
    Cc: Chris Wilson <email address hidden>
    Tested-by: <email address hidden> [v2]
    Signed-off-by: Mika Kuoppala <email address hidden>

commit 8dee52997891108eec8e4df12dd02f3a060d9cb8
Author: Chris Wilson <email address hidden>
Date: Wed Nov 19 13:38:20 2014 +0000

    sna: Add more checks and asserts for BLT capable bo

    Before we use the BLT for core acceleration, double check that we can.
    This should catch the case where we attempt to operate on SHM pixmaps
    which do not meet the restrictions.

    Signed-off-by: Chris Wilson <email address hidden>

commit a90cc3b3889fafbd91c11c42d068a9d6474e218b
Author: Chris Wilson <email address hidden>
Date: Tue Nov 18 08:37:25 2014 +0000

    sna: Tweak alignment constraints on gen8 to allow BLT

    The previous commits prevent us from using the BLT if the destination
    address is misaligned. Honour that restriction when creating buffers as
    well, so that they are always usuable by the BLT.

    Signed-off-by: Chris Wilson <email address hidden>