Workaround to get interlaced PAL output using 6.7.196
At latest geexbox developer version , xorg has DRI stuff included and I no longer managed to compile 6.6.3 in it:-(
However, I stumbled on a workaround:
1) Start Xorg using PAL interlaced setting. RGB output is like reported bug
2) use
xrandr -display :0.0 -s 1
to switch to different (also PAL interlaced) setting. Now RGB output is OK !
Even switching back to startup config using xrandr -display :0.0 -s 0 , PAL output is valid!
I have these lines in my xorg.conf
HorizSync 15-16
VertRefresh 49-51
Modeline "PALWS" 24.75 1280 1321 1437 1584 576 580 585 625 -hsync -vsync interlace
Modeline "PAL" 22.50 1152 1195 1301 1440 576 580 583 625 -hsync -vsync interlace
Intention of these 2 PAL modelines: My vga to scart convertor uses vertical sync length (note 585 and 583 in Vertical part of modeline) to switch the scart 16:9 pin.
Workaround to get interlaced PAL output using 6.7.196
At latest geexbox developer version , xorg has DRI stuff included and I no longer managed to compile 6.6.3 in it:-(
However, I stumbled on a workaround:
1) Start Xorg using PAL interlaced setting. RGB output is like reported bug
2) use
xrandr -display :0.0 -s 1
to switch to different (also PAL interlaced) setting. Now RGB output is OK !
Even switching back to startup config using xrandr -display :0.0 -s 0 , PAL output is valid!
I have these lines in my xorg.conf
HorizSync 15-16
VertRefresh 49-51
Modeline "PALWS" 24.75 1280 1321 1437 1584 576 580 585 625 -hsync -vsync interlace
Modeline "PAL" 22.50 1152 1195 1301 1440 576 580 583 625 -hsync -vsync interlace
Intention of these 2 PAL modelines: My vga to scart convertor uses vertical sync length (note 585 and 583 in Vertical part of modeline) to switch the scart 16:9 pin.