------- Comment From <email address hidden> 2024-01-09 11:03 EDT-------
I would recommend taking following patches:
$ git log --oneline --grep 'Fixes:' --grep stable@ $(git merge-base v6.2.0 upstream/stable-7.2) upstream/stable-7.2 target/s390x/tcg/
[-] 154760b6db6 target/s390x: Fix LAALG not updating cc_src
[+] e7ecf6a45f4 target/s390x: Check reserved bits of VFMIN/VFMAX's M5
[+] 7760cfd9c82 target/s390x: Fix VSTL with a large length
[+] 7c4ce14b414 target/s390x: Use a 16-bit immediate in VREP
[-] 08a4e6da12d target/s390x: Fix the "ignored match" case in VSTRS
[+] c1bdd3cdc46 target/s390x: Fix assertion failure in VFMIN/VFMAX with type 13
[+] cdd6b6a764d target/s390x: Make MC raise specification exception when class >= 16
[+] 0ef0b83104e target/s390x: Fix ICM with M3=0
[-] 7cf33584512 target/s390x: Fix CONVERT TO LOGICAL/FIXED with out-of-range inputs
[+] 34009bfd681 target/s390x: Fix CLM with M3=0
[+] 772caa5f231 target/s390x: Make CKSM raise an exception if R2 is odd
[+] cc271aa410e target/s390x: Fix LOCFHR taking the wrong half of R2
[+] 347714a28cc target/s390x: Fix LCBB overwriting the top 32 bits
[+] 00acdd8a9f6 s390x/tcg: Fix LDER instruction format
commit bdbc87e323ee417735141ed2b11dab0091b57593
Author: Richard Henderson <email address hidden>
Date: Sun Feb 26 17:55:31 2023 -1000
target/s390x: Split out gen_ri2
[+] 17b032c6598 target/s390x: Fix emulation of C(G)HRL
[+] f7d81a351d6 target/s390x: Fix emulation of the VISTR instruction
[+] 131aafa7eff s390x/tcg: Fix opcode for lzrf
[+] d324c21ba0b target/s390x: Fix CLFIT and CLGIT immediate size
[+] 13c59eb09bd target/s390x: fix handling of zeroes in vfmin/vfmax
[+] db67a6ff480 target/s390x: Fix writeback to v1 in helper_vstl
[+] 21641ee5a9b target/s390x: Fix the accumulation of ccm in op_icm
[+] 16ed5f14215 s390x/tcg: Fix BRCL with a large negative offset
[+] fc3dd86a290 s390x/tcg: Fix BRASL with a large negative offset
[+] 2092fdd97c2 s390x: sck: load into a temporary not into in1
[+] 6da170beda3 target/s390x: Fix shifting 32-bit values for more than 31 bits
[+] df103c09bc2 target/s390x: Fix cc_calc_sla_64() missing overflows
[+] 57556b28afd target/s390x: Fix SRDA CC calculation
[+] 521130f2672 target/s390x: Fix SLDA sign bit index
The patches with [-] are irrelevant or cannot be applied without extensive modifications.
bdbc87e323ee417735141ed2b11dab0091b57593 is a pre-req, as you already identified.
2092fdd97c2 has a trivial conflicts which can be resolved by taking the new code.
------- Comment From <email address hidden> 2024-01-09 11:03 EDT-------
I would recommend taking following patches:
$ git log --oneline --grep 'Fixes:' --grep stable@ $(git merge-base v6.2.0 upstream/ stable- 7.2) upstream/stable-7.2 target/s390x/tcg/
[-] 154760b6db6 target/s390x: Fix LAALG not updating cc_src
[+] e7ecf6a45f4 target/s390x: Check reserved bits of VFMIN/VFMAX's M5
[+] 7760cfd9c82 target/s390x: Fix VSTL with a large length
[+] 7c4ce14b414 target/s390x: Use a 16-bit immediate in VREP
[-] 08a4e6da12d target/s390x: Fix the "ignored match" case in VSTRS
[+] c1bdd3cdc46 target/s390x: Fix assertion failure in VFMIN/VFMAX with type 13
[+] cdd6b6a764d target/s390x: Make MC raise specification exception when class >= 16
[+] 0ef0b83104e target/s390x: Fix ICM with M3=0
[-] 7cf33584512 target/s390x: Fix CONVERT TO LOGICAL/FIXED with out-of-range inputs
[+] 34009bfd681 target/s390x: Fix CLM with M3=0
[+] 772caa5f231 target/s390x: Make CKSM raise an exception if R2 is odd
[+] cc271aa410e target/s390x: Fix LOCFHR taking the wrong half of R2
[+] 347714a28cc target/s390x: Fix LCBB overwriting the top 32 bits
[+] 00acdd8a9f6 s390x/tcg: Fix LDER instruction format
commit bdbc87e323ee417 735141ed2b11dab 0091b57593
Author: Richard Henderson <email address hidden>
Date: Sun Feb 26 17:55:31 2023 -1000
target/s390x: Split out gen_ri2
[+] 17b032c6598 target/s390x: Fix emulation of C(G)HRL
[+] f7d81a351d6 target/s390x: Fix emulation of the VISTR instruction
[+] 131aafa7eff s390x/tcg: Fix opcode for lzrf
[+] d324c21ba0b target/s390x: Fix CLFIT and CLGIT immediate size
[+] 13c59eb09bd target/s390x: fix handling of zeroes in vfmin/vfmax
[+] db67a6ff480 target/s390x: Fix writeback to v1 in helper_vstl
[+] 21641ee5a9b target/s390x: Fix the accumulation of ccm in op_icm
[+] 16ed5f14215 s390x/tcg: Fix BRCL with a large negative offset
[+] fc3dd86a290 s390x/tcg: Fix BRASL with a large negative offset
[+] 2092fdd97c2 s390x: sck: load into a temporary not into in1
[+] 6da170beda3 target/s390x: Fix shifting 32-bit values for more than 31 bits
[+] df103c09bc2 target/s390x: Fix cc_calc_sla_64() missing overflows
[+] 57556b28afd target/s390x: Fix SRDA CC calculation
[+] 521130f2672 target/s390x: Fix SLDA sign bit index
The patches with [-] are irrelevant or cannot be applied without extensive modifications. 735141ed2b11dab 0091b57593 is a pre-req, as you already identified.
bdbc87e323ee417
2092fdd97c2 has a trivial conflicts which can be resolved by taking the new code.
So the following is looking good to me:
$ git checkout v6.2.0 735141ed2b11dab 0091b57593 347714a28cc cc271aa410e 772caa5f231 34009bfd681 0ef0b83104e cdd6b6a764d c1bdd3cdc46 7c4ce14b414 7760cfd9c82 e7ecf6a45f4
$ git cherry-pick 521130f2672 57556b28afd df103c09bc2 6da170beda3 2092fdd97c2 fc3dd86a290 16ed5f14215 21641ee5a9b db67a6ff480 13c59eb09bd d324c21ba0b 131aafa7eff f7d81a351d6 17b032c6598 00acdd8a9f6 bdbc87e323ee417