I don't exactly know what type of CPU can execute this opcode, so maybe my (AMD
Duron) can't. However this fact does need
some correction unless we don't want support hw accel. 3d gfx on this kind of
CPU, it the problem really caused by the
lacking support for this opcode on this CPU ...
Doing disassembly with gdb for the given address (0xb78fa4fc):
0xb78fa4f7 <mgaInitState+412>: fmul %st(1),%st %ebp),% xmm0
0xb78fa4f9 <mgaInitState+414>: fstps 0xfffffff0(%ebp)
0xb78fa4fc <mgaInitState+417>: movss 0xfffffff0(
0xb78fa501 <mgaInitState+422>: cvttss2si %xmm0,%edx
0xb78fa505 <mgaInitState+426>: movzbl %dl,%edx
0xb78fa508 <mgaInitState+429>: shl $0x10,%edx
So it's about "movss" instruction in /usr/lib/ dri/mga_ dri.so which belongs to
package libgl1-mesa-dri:
lgb@oxygene:~$ dpkg -S /usr/lib/ dri/mga_ dri.so dri/mga_ dri.so
libgl1-mesa-dri: /usr/lib/
I don't exactly know what type of CPU can execute this opcode, so maybe my (AMD
Duron) can't. However this fact does need
some correction unless we don't want support hw accel. 3d gfx on this kind of
CPU, it the problem really caused by the
lacking support for this opcode on this CPU ...
Please help me!