Created an attachment (id=34811)
try the debug patch that dumps the output pixel clock range of sdvo device
From the dmesg log we can get one message related with SDVO.
>drm:intel_sdvo_debug_write], SDVOB: W: 16 48 3F 40 30 62 B0 32 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
> [drm:intel_sdvo_debug_response], SDVOB: R: (Not supported)
It seems that this SDVO device can't support the command of setting the output timing of SDVO device. I am not sure whether the high resolution is supported by this SDVO device.
Will you please try the debug patch and attach the output of dmesg?
Created an attachment (id=34811)
try the debug patch that dumps the output pixel clock range of sdvo device
From the dmesg log we can get one message related with SDVO. intel_sdvo_ debug_write] , SDVOB: W: 16 48 3F 40 30 62 B0 32 40 (SDVO_CMD_ SET_OUTPUT_ TIMINGS_ PART1) sdvo_debug_ response] , SDVOB: R: (Not supported)
>drm:
> [drm:intel_
It seems that this SDVO device can't support the command of setting the output timing of SDVO device. I am not sure whether the high resolution is supported by this SDVO device.
Will you please try the debug patch and attach the output of dmesg?
Thanks.
Yakiu