Comment 108 for bug 349412

I think we're winning! Aside from that you also suffer from the spurious TV detection, which drives the system nuts later on, I think we're underestimating the FIFO space required. Even the 50 for the external display is too little for 1680x1050 and up [as reported in dmesg].

Let's bump up the amount of memory allocated to each pipe:

  I915_WRITE(DSPARB, ((80 + 40) << 7) | 40);

and be more pessimistic in our latency:

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_d
index a0a8457..d020823 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2858,7 +2858,7 @@ static void pineview_disable_cxsr(struct drm_device *dev)
  * A value of 5us seems to be a good balance; safe for very low end
  * platforms but not overly aggressive on lower latency configs.
  */
-static const int latency_ns = 5000;
+static const int latency_ns = 7000;

 static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
 {

Karl, do you have any clues as to what memory you have in your system? In our table of know configurations on PineView, latency ranges from 3300 (DDR2-400) to 6500 (DDR3-667). In constrast Ironlake latency is 700!