Comment 0 for bug 2045796

Revision history for this message
Andy Gospodarek (andygospo) wrote : Add Support for Broadcom 5760X Adapters

These patches are needed on top of v6.7 to support Broadcom 5760X Adapters. These patches currently reside in the net-next tree and will be included in v6.8.

Prerequisite commits in net-next today:

c1056a59aee1 bnxt_en: Optimize xmit_more TX path
ba098017791e bnxt_en: Use existing MSIX vectors for all mqprio TX rings
f07b58801bef bnxt_en: Add macros related to TC and TX rings
f5b29c6afe36 bnxt_en: Add helper to get the number of CP rings required for TX rings
0589a1ed4d33 bnxt_en: Support up to 8 TX rings per MSIX
877edb347323 bnxt_en: Refactor bnxt_hwrm_set_coal()
5a3c585fa83f bnxt_en: New encoding for the TX opaque field
ebf72319cef6 bnxt_en: Refactor bnxt_tx_int()
9c0b06de6fb6 bnxt_en: Remove BNXT_RX_HDL and BNXT_TX_HDL
7845b8dfc713 bnxt_en: Add completion ring pointer in TX and RX ring structures
d1eec614100c bnxt_en: Restructure cp_ring_arr in struct bnxt_cp_ring_info
7f0a168b0441 bnxt_en: Add completion ring pointer in TX and RX ring structures
34eec1f29a59 bnxt_en: Put the TX producer information in the TX BD opaque field

These 13 patches below were submitted on 11/20/23 and accepted on 11/21/23. These are the initial patches with 5760X contents.

1c7fd6ee2fe4 bnxt_en: Rename some macros for the P5 chips
f94471f3ce74 bnxt_en: Modify the NAPI logic for the new P7 chips
c09d22674b94 bnxt_en: Modify RX ring indexing logic.
6d1add95536b bnxt_en: Modify TX ring indexing logic.
b9e0c47ee2ec bnxt_en: Add db_ring_mask and related macro to bnxt_db_info struct.
236e237f8ffe bnxt_en: Add support for HWRM_FUNC_BACKING_STORE_CFG_V2 firmware calls
6a4d0774f02d bnxt_en: Add support for new backing store query firmware API
b098dc5a3357 bnxt_en: Add bnxt_setup_ctxm_pg_tbls() helper function
2ad67aea11f2 bnxt_en: Use the pg_info field in bnxt_ctx_mem_type struct
035c57615982 bnxt_en: Add page info to struct bnxt_ctx_mem_type
76087d997a84 bnxt_en: Restructure context memory data structures
e50dc4c2206e bnxt_en: Free bp->ctx inside bnxt_free_ctx_mem()
aa8460bacf49 bnxt_en: The caller of bnxt_alloc_ctx_mem() should always free bp->ctx

The next 15 patches were submitted on 12/1/23 and accepted on 12/4/23. These are all the basic L2 patches for 5760X including the PCI IDs:

2012a6abc876 bnxt_en: Add 5760X (P7) PCI IDs
047a2d38e40c bnxt_en: Report the new ethtool link modes in the new firmware interface
7b60cf2b641a bnxt_en: Support force speed using the new HWRM fields
30c0bb63c2ea bnxt_en: Support new firmware link parameters
cf47fa5ca5bb bnxt_en: Refactor ethtool speeds logic
a7445d69809f bnxt_en: Add support for new RX and TPA_START completion types for P7
39b2e62be370 bnxt_en: Refactor and refine bnxt_tpa_start() and bnxt_tpa_end().
c2f8063309da bnxt_en: Refactor RX VLAN acceleration logic.
13d2d3d381ee bnxt_en: Add new P7 hardware interface definitions