(In reply to Doug Smythies from comment #28) > Created attachment 295533 [details] > changing the MWAIT definition of C1E fixes the problem
Conversely, I have tried to determine if other idle states can be broken by introducing the least significant bit of the MWAIT.
I did idle state 3, C3, and could not detect any change in system response.
I did idle state 5, C7S, which already had the bit set, along with bit 1, so I set bit one to 0:
.name = "C7s", - .desc = "MWAIT 0x33", - .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED, + .desc = "MWAIT 0x31", + .flags = MWAIT2flg(0x31) | CPUIDLE_FLAG_TLB_FLUSHED, .exit_latency = 124, .target_residency = 800, .enter = &intel_idle,
I could not detect any change in system response.
I am also unable to detect any difference in system response between idle state 1, C1, and idle state 2, C1E, with this change. I do not know if the change merely makes idle state 2 = idle state 1.
(In reply to Doug Smythies from comment #28)
> Created attachment 295533 [details]
> changing the MWAIT definition of C1E fixes the problem
Conversely, I have tried to determine if other idle states can be broken by introducing the least significant bit of the MWAIT.
I did idle state 3, C3, and could not detect any change in system response.
I did idle state 5, C7S, which already had the bit set, along with bit 1, so I set bit one to 0:
.name = "C7s", FLAG_TLB_ FLUSHED, FLAG_TLB_ FLUSHED,
- .desc = "MWAIT 0x33",
- .flags = MWAIT2flg(0x33) | CPUIDLE_
+ .desc = "MWAIT 0x31",
+ .flags = MWAIT2flg(0x31) | CPUIDLE_
.exit_latency = 124,
.target_residency = 800,
.enter = &intel_idle,
I could not detect any change in system response.
I am also unable to detect any difference in system response between idle state 1, C1, and idle state 2, C1E, with this change. I do not know if the change merely makes idle state 2 = idle state 1.