Comment 0 for bug 1736145

== Comment: #0 - Breno Leitao <email address hidden> - 2017-12-04 05:50:27 ==
kexec can leave MMU registers set, PIDR in particular, when booting the
new kernel. The boot sequence does not zero PIDR ever, and it only gets
changed as CPUs first switch to userspace processes. This can leave a
window where speculative accesses from a CPU to quadrant 0 can pick up
translations in the partition table that may be set up for processes
running on other CPUs. These cached translations will not be involved in
the invalidation protocol, so we can end with stable TLB and PWC.

We need to have this patch included in Ubuntu kernel.
https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-December/166424.html

We do not have commit id, but once we have, I will post here. There is no need to include the patch prior to upstream acceptance.

== Comment: #2 - VIPIN K. PARASHAR <email address hidden> - 2017-12-04 06:57:52 ==
(In reply to comment #0)
>
> We need to have this patch included in Ubuntu kernel.
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-December/166424.html
>
> We do not have commit id, but once we have, I will post here. There is no
> need to include the patch prior to upstream acceptance.
>

.. Patch subject reads as follows:

[PATCH] powerpc/64s: ISAv3 initialize MMU registers before setting partition table