Various glibc versions use AVX512 or AVX incorrectly in memcpy/memset or use AVX unintentionally due to branch mispredictions. On SKX using AVX can lower the frequency by several bins.
There was a decision to not use AVX in memcpy/memset to avoid these problems for legacy code.
glibc mainline has been fixed. The actual state per version depends on the version, and what backports it has applied.
See the attachment for the fix status for several glibc versions. Need to figure out for each supported glibc release if they are affected, and submit backports of the fixes.
Note that this is a somewhat sensitive topic with DCG. Any fixes should be low key.
How to test:
Non AVX test code like compiles should not report any LVL1,2 AVX licenses with
perf stat -e cpu/event=0x28,umask=0x18,name=core_power_lvl1_turbo_license/,cpu/event=0x28,umask=0x20,name=core_power_lvl2_turbo_license/,cpu/event=0x28,umask=0x40,name=core_power_throttle/,cycles -a -I 1000 sleep 10
Various glibc versions use AVX512 or AVX incorrectly in memcpy/memset or use AVX unintentionally due to branch mispredictions. On SKX using AVX can lower the frequency by several bins. 0x28,umask= 0x18,name= core_power_ lvl1_turbo_ license/ ,cpu/event= 0x28,umask= 0x20,name= core_power_ lvl2_turbo_ license/ ,cpu/event= 0x28,umask= 0x40,name= core_power_ throttle/ ,cycles -a -I 1000 sleep 10
There was a decision to not use AVX in memcpy/memset to avoid these problems for legacy code.
glibc mainline has been fixed. The actual state per version depends on the version, and what backports it has applied.
See the attachment for the fix status for several glibc versions. Need to figure out for each supported glibc release if they are affected, and submit backports of the fixes.
Note that this is a somewhat sensitive topic with DCG. Any fixes should be low key.
How to test:
Non AVX test code like compiles should not report any LVL1,2 AVX licenses with
perf stat -e cpu/event=