Comment 34 for bug 1723619

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In , Ilia Mirkin (imirkin) wrote :

This appears to be a GM204.

Note that 13a8651920 fixed a regression for most people precisely of the type that it caused for you, i.e. DDC failing.

So it sounds like the address-only transactions were actually working well for you before (which basically is impossible since *size - 1 would have been 0xffffffff and have overwritten the whole ctrl), and these have now been broken.

This leads me to believe that a different bit is now the address-only transaction bit. In gm200_i2c_aux_xfer, we assume it's 0x100 (same as for GF119+). Ben, did you trace it on GM200+ separately?