* Google requested patches for AmpereOne machine t ype
[Fix]
* Cherry-picks from upstream
0e5d5ae837c8 ("arm64: Add AMPERE1 to the Spectre-BHB affected list")
db26f8f2da92 ("clocksource/drivers/arch_arm_timer: Move workaround synchronisation around")
c1153d52c414 ("clocksource/drivers/arm_arch_timer: Fix masking for high freq counters")
ec8f7f3342c8 ("clocksource/drivers/arm_arch_timer: Drop unnecessary ISB on CVAL programming")
41f8d02a6a55 ("clocksource/drivers/arm_arch_timer: Remove any trace of the TVAL programming interface")
012f18850452 ("clocksource/drivers/arm_arch_timer: Work around broken CVAL implementations")
30aa08da35e0 ("clocksource/drivers/arm_arch_timer: Advertise 56bit timer to the core code")
8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
72f47a3f0ea4 ("clocksource/drivers/arm_arch_timer: Fix MMIO base address vs callback ordering issue")
ac9ef4f24cb2 ("clocksource/drivers/arm_arch_timer: Move drop _tval from erratum function names")
a38b71b0833e ("clocksource/drivers/arm_arch_timer: Move system register timer programming over to CVAL")
1e8d929231cf ("clocksource/drivers/arm_arch_timer: Extend write side of timer register accessors to u64")
d72689988d67 ("clocksource/drivers/arm_arch_timer: Drop CNT*_TVAL read accessors")
4775bc63f880 ("clocksource/arm_arch_timer: Add build-time guards for unhandled register accesses")
[Test Case]
* Compile tested
* Boot tested
* To be tested by Google
[Where things could go wrong]
* Low chance of regression. Changes isolated to to timers.
[Impact]
* Google requested patches for AmpereOne machine t ype
[Fix]
* Cherry-picks from upstream
0e5d5ae837c8 ("arm64: Add AMPERE1 to the Spectre-BHB affected list") drivers/ arch_arm_ timer: Move workaround synchronisation around") drivers/ arm_arch_ timer: Fix masking for high freq counters") drivers/ arm_arch_ timer: Drop unnecessary ISB on CVAL programming") drivers/ arm_arch_ timer: Remove any trace of the TVAL programming interface") drivers/ arm_arch_ timer: Work around broken CVAL implementations") drivers/ arm_arch_ timer: Advertise 56bit timer to the core code") drivers/ arm_arch_ timer: Move MMIO timer programming over to CVAL") drivers/ arm_arch_ timer: Fix MMIO base address vs callback ordering issue") drivers/ arm_arch_ timer: Move drop _tval from erratum function names") drivers/ arm_arch_ timer: Move system register timer programming over to CVAL") drivers/ arm_arch_ timer: Extend write side of timer register accessors to u64") drivers/ arm_arch_ timer: Drop CNT*_TVAL read accessors") arm_arch_ timer: Add build-time guards for unhandled register accesses")
db26f8f2da92 ("clocksource/
c1153d52c414 ("clocksource/
ec8f7f3342c8 ("clocksource/
41f8d02a6a55 ("clocksource/
012f18850452 ("clocksource/
30aa08da35e0 ("clocksource/
8b82c4f883a7 ("clocksource/
72f47a3f0ea4 ("clocksource/
ac9ef4f24cb2 ("clocksource/
a38b71b0833e ("clocksource/
1e8d929231cf ("clocksource/
d72689988d67 ("clocksource/
4775bc63f880 ("clocksource/
[Test Case]
* Compile tested
* Boot tested
* To be tested by Google
[Where things could go wrong]
* Low chance of regression. Changes isolated to to timers.
[Other Info]
* SF #00372821