Ubuntu
cross-toolchain-base-ports package

  1. Bug #2026829
  2. Comment #1

Comment 1 for bug 2026829

Revision history for this message
Heinrich Schuchardt (xypron) wrote :

The RISC-V architecture uses different privilege levels (M-mode, S-mode, U-mode). Depending on the mode different extensions of the instruction set are available. See the RISC-V profile specification in https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc.

As in S-mode no floating point extensions are available floats and doubles have to be passed in integer registers. This is the lp64 ABI. Currently we lack a toolchain for softfloat (__riscv_float_abi_soft) RISC-V binaries.