Comment 76 for bug 893210
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1b1ed1a
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SERIAL CONFIGURATION REGISTER Index 0x74
D4
INTS Interrupt Mode Select This bit selects the JS interrupt implementation path.
0 = Bit 0 Slot 12 (modem interrupt).
1 = Slot 6 valid bit (MIC ADC interrupt).
2.2.9 GLOB_STA—Global Status Register (Audio—D30:F2) I/O Address: Default Value: Lockable: Bit 31:30Reserved. NABMBAR + 30h
GPI Status Change Interrupt (GSCI) — R/WC.
0 =Software clears this bit by writing a 1 to it.
1 =This bit reflects the state of bit 0 in slot 12, and is set when bit 0 of slot 12 is set. This indicates that one of the GPI’s changed state, and that the new values are available in slot 12. This bit is not affected by AC ‘97 Audio Function D3HOT to D0 Reset.