The sigill is for the code generated for the aa32 instruction
0xf7ca0820: f3780407 vshl.u64 d16, d7, d8
---- 00000000f7ca0820 0000000000000000 0000000000000000 ld_vec v64,e8,tmp9,env,$0xf68 pref=0xffffffff00000000 ld_vec v64,e8,tmp10,env,$0x1060 pref=0xffffffff00000000 neg_vec v64,e64,tmp15,tmp10 pref=0xffffffff00000000 ...
-- guest addr 0x00000000f7ca0820 0xffff2a790d88: fd47b660 ldr d0, [x19, #0xf68] 0xffff2a790d8c: fd483261 ldr d1, [x19, #0x1060] 0xffff2a790d90: 2ee0b822 .byte 0x22, 0xb8, 0xe0, 0x2e
The illegal instruction is attempting neg (vector) with v1.1d, but that runs afoul of the isa constraint
if size:Q == '110' then UNDEFINED;
We should have used neg (scalar) instead.
I can replicate the sigill with RISU.
The sigill is for the code generated for the aa32 instruction
0xf7ca0820: f3780407 vshl.u64 d16, d7, d8
---- 00000000f7ca0820 0000000000000000 0000000000000000 tmp9,env, $0xf68 pref=0xffffffff 00000000 tmp10,env, $0x1060 pref=0xffffffff 00000000 00000000
ld_vec v64,e8,
ld_vec v64,e8,
neg_vec v64,e64,tmp15,tmp10 pref=0xffffffff
...
-- guest addr 0x00000000f7ca0820
0xffff2a790d88: fd47b660 ldr d0, [x19, #0xf68]
0xffff2a790d8c: fd483261 ldr d1, [x19, #0x1060]
0xffff2a790d90: 2ee0b822 .byte 0x22, 0xb8, 0xe0, 0x2e
The illegal instruction is attempting neg (vector) with v1.1d,
but that runs afoul of the isa constraint
if size:Q == '110' then UNDEFINED;
We should have used neg (scalar) instead.
I can replicate the sigill with RISU.