In the meantime I tried a number of so-called solutions published on Reddit and other places, none of which seems to work.
So if I understand it correctly, there is currently no solution to the incorrect l3 cache layout for Zen architecture CPUs. At best a workaround for Linux guests.
Thanks for clarifying, Jan.
In the meantime I tried a number of so-called solutions published on Reddit and other places, none of which seems to work.
So if I understand it correctly, there is currently no solution to the incorrect l3 cache layout for Zen architecture CPUs. At best a workaround for Linux guests.
I hope somebody is looking into that.