I've just found the same problem with gen_compute_branch1,
00200008 jr at 4540563a bc1any4f $fcc0,0xffffffffbfc158ec
The cause is the same - if the instruction set is wrong then the delay slot check is skipped.
I've just found the same problem with gen_compute_ branch1,
00200008 jr at fbfc158ec
4540563a bc1any4f $fcc0,0xfffffff
The cause is the same - if the instruction set is wrong then the delay slot check is skipped.