Comment 1 for bug 1488363

I ran a bisect, and here's the result:

b8eb5512fd8a115f164edbbe897cdf8884920ccb is the first bad commit
commit b8eb5512fd8a115f164edbbe897cdf8884920ccb
Author: Nadav Amit <email address hidden>
Date: Mon Apr 13 02:32:08 2015 +0300

    target-i386: disable LINT0 after reset

    Due to old Seabios bug, QEMU reenable LINT0 after reset. This bug is long gone
    and therefore this hack is no longer needed. Since it violates the
    specifications, it is removed.

    Signed-off-by: Nadav Amit <email address hidden>
    Message-Id: <email address hidden>
    Signed-off-by: Paolo Bonzini <email address hidden>

:040000 040000 a8ec76841b8d4e837c2cd0d0b82e08c0717a0ec6 d33744231c98c9f588cefbc92f416183f639706f M hw

$ git diff 7398dfc7799a50097803db4796c7edb6cd7d47a1 b8eb5512fd8a115f164edbbe897cdf8884920ccb

diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 042e960..d38d24b 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -243,15 +243,6 @@ static void apic_reset_common(DeviceState *dev)
     info->vapic_base_update(s);

     apic_init_reset(dev);
-
- if (bsp) {
- /*
- * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization
- * time typically by BIOS, so PIC interrupt can be delivered to the
- * processor when local APIC is enabled.
- */
- s->lvt[APIC_LVT_LINT0] = 0x700;
- }
 }

 /* This function is only used for old state version 1 and 2 */

And then to confirm it:

git checkout v2.4.0
git revert b8eb5512fd8a115f164edbbe897cdf8884920ccb

And this build works. :)