Comment 6 for bug 992723

If I temporarily turn off "auto enforce DRC clearance", how can I later detect mistakes that have been made, if the DRC tool doesn't do it? (I might be missing something. I'm doing my first design on PCB to see if it is practical to migrate to it from Protel 99 SE.)

Adding netlist compare to the DRC would be great, of course. (Yes, I know, a patch would help...) That's what I'm used to personally, from Protel.