Comment 1 for bug 1621067

> - aes
> - pclmuldq
> - x2apic
> - avx (NOT avx2)
> - ssse3, sse4_1, sse4_2

Attempt to use these instructions in the guest will fail if the hypervisor is not aware how to enable/handle them properly. Therefore the hypervisor (the host kernel kvm module) is the best source of knowledge about which CPU flags should be advertised to the guest.

For example, (Intel) CPU executes AVX instructions only if XCR0.AVX bit is set,
otherwise it raises #GP exception, which eventually translates either to SIGSEGV delivered
to the guest process which was trying to execute such an instruction, or the *guest* kernel panic (if the guest kernel itself was trying to execute the instruction in question).

Setting XCR0 is a privileged instruction, so the guest kernel can't set it, the hypervisor
(the host kernel kvm module) should set it. The hypervisor should be aware of AVX instructions for this to work (which is not the case if the *host* kernel is old enough).

Thus the guest can't use AVX instructions without proper hypervisor support no matter if these instructions are advertised to the guest or not.