Is this patch the fix? It can not match the bug description.
commit 74e78d6bae1904e87469da5ed87e9f6bd1131f46
Author: Huazhong Tan <email address hidden>
Date: Wed Nov 20 10:07:15 2019 +0800
net: hns3: fix a wrong reset interrupt status mask
According to hardware user manual, bits5~7 in register
HCLGE_MISC_VECTOR_INT_STS means reset interrupts status,
but HCLGE_RESET_INT_M is defined as bits0~2 now. So it
will make hclge_reset_err_handle() read the wrong reset
interrupt status.
This patch fixes this wrong bit mask.
Fixes: 2336f19d7892 ("net: hns3: check reset interrupt status when reset fails")
Signed-off-by: Huazhong Tan <email address hidden>
Signed-off-by: David S. Miller <email address hidden>
Is this patch the fix? It can not match the bug description.
commit 74e78d6bae1904e 87469da5ed87e9f 6bd1131f46
Author: Huazhong Tan <email address hidden>
Date: Wed Nov 20 10:07:15 2019 +0800
net: hns3: fix a wrong reset interrupt status mask
According to hardware user manual, bits5~7 in register MISC_VECTOR_ INT_STS means reset interrupts status, err_handle( ) read the wrong reset
HCLGE_
but HCLGE_RESET_INT_M is defined as bits0~2 now. So it
will make hclge_reset_
interrupt status.
This patch fixes this wrong bit mask.
Fixes: 2336f19d7892 ("net: hns3: check reset interrupt status when reset fails")
Signed-off-by: Huazhong Tan <email address hidden>
Signed-off-by: David S. Miller <email address hidden>