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1b1ed1a
(Get the code!)
Just checked the latest nightly build (d88df89). The issue is still there.
The designs are rather huge ... I can try to chop them but it looks like it's going to take hours...
The bus definitions are as shown in the screenshot above.
In another design the same issue exists but without a bus. Instead it happens with local power net that is an alias for a global power net. Well, at least to me from the outside it looks like it's the same issue. At first I thought I can reproduce it quickly in this test case, but after closing eeschema and updating the PCB again it went away.
Then I've noticed, in the other design updating the PCB from the schematic repeatedly causes always some (but not all) net names to toggle back and forth. It requires at least eeschema to be closed before updating the PCB (which will now always re-open eeschema .... ugh). Sometimes it happens only after closing both eeschema and pcbnew... not sure of those issues are related.