Display of the solder mask of vias in Pcbnew
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
KiCad |
Triaged
|
Wishlist
|
Unassigned |
Bug Description
Application: kicad
Version: (5.0.0), release build
Libraries:
wxWidgets 3.0.3
libcurl/7.54.1 OpenSSL/1.0.2l zlib/1.2.11 libssh2/1.8.0 nghttp2/1.23.1 librtmp/2.3
Platform: Windows 8 (build 9200), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
wxWidgets: 3.0.3 (wchar_t,wx containers,
Boost: 1.60.0
OpenCASCADE Community Edition: 6.8.0
Curl: 7.54.1
Compiler: GCC 7.1.0 with C++ ABI 1011
Build settings:
USE_
USE_
KICAD_
KICAD_
KICAD_
KICAD_
BUILD_
KICAD_
KICAD_
KICAD_SPICE=ON
Feature request :
By default, the vias are displayed « tented » in Pcbnew (see layers F.Mask or B.Mask of any Kicad PCB design). It would be preferable to leave them not covered by solder mask because, during the placement, that allows to visually check that the via isn’t too close to its pad and, considering the solder mask clearance around the via, there’s a solder mask minimum width between them and consequently a reliable solder joint (no paste migration from a pad to its via thanks to the solder mask dam). Please, consider also the feature request https:/
Finally, if the designer wants to cover the vias in the gerber outputs, it’s always possible (menu File > Plot > uncheck Do not tent via).
I think it’s a simple feature to do and a first step before implement a more complete DFM such as https:/
Changed in kicad: | |
importance: | Undecided → Wishlist |
status: | New → Triaged |