Comment 9 for bug 1605049

Hehe, this looks even stranger, but actually works better... (?!)

    (pad 7 thru_hole circle (at -3.81 6.35) (size -0.3 -0.3) (drill 1.25) (layers *.Cu *.Mask)
      (net 1 +5V))
    (pad 7 smd rect (at -3.81 6.35) (size 2.5 1.5) (layers F.Cu F.Mask)
      (net 1 +5V))
    (pad 7 smd roundrect (at -3.81 6.35) (size 3.5 1.7) (layers B.Cu B.Mask)(roundrect_rratio 0.25)
      (net 1 +5V))

That negative size seems to load/save ok and it subtracts from the thermal aversion.
I'm not sure using a negative size is a 'good idea', as it rather looks like an error.

Om the translator I work on, I may settle on a small, non zero pad, as that looks valid and deliberate.
Once the thermal aversion bug is fixed, this would not matter.

I can add a note to try negative sizes, if rare thermal non-connects show up.