Comment 11 for bug 1551353

I have done many tests with KiCad and 0 size pads in June release, for a Mentor Translator

"jp-charras: A 0 sized pad will create a lot of issues and potential crashes in Pcbnew.
For a TH pad, this is even a non sense: a TH pad connects layers between layers, and this is not possible with a 0 sized pad.

I use a Zero Size Cu PAD, with a Finite Drill, to carry Drill info, and add F.Cu and B.Cu pads to carry the actual copper shape.
This approach allows kiCad to support different sizes/rotations on F/B, and allows slot rotate too.
That covers most possible Mentor PADS PadStacks.

Tests show :
KiCad can load and save zero size pads, without crashes.
There is one niggling pour+thermal DRC issue, but I think that actually _needs_ a zero size pad in KiCad to solve.

" eldar: 0 sized pads maked maybe for don't drill them was done with lazy man who don't want edit footprint."

In Mentor releases, the 0 Size PADS is actually common, which is another reason it should be supported.

It is used as something of a workaround in cases of
a) Vertical and Horiz TO220. Mentor rules mandated equal pad-count on alternate decals, but V=3,H=4.
the solution is to have 4th 0 Size pad on V.
b) Pin number skipping - Older versions that needed sparse DIP numbering used 0 Size pads to skip numbers.

Newer Mentor releases I think now allow Alternates with differing Pin counts, and a new AlphaNumber scheme
allows eg 1,7,8,14 on a DIP4 - however, there will be plenty of old-database designs out there, that will use the 0 size entity.

My suggestion would be to keep the P-CAD skip-0 patch, until the fill+thermal connectivity DRC fail detail is resolved, and then, when I have tested Mentor imports, it should be safe to re-enable the PAD Size 0 in PCAD.