KiCad

Bug #1537120
Comment #6

Comment 6 for bug 1537120

Revision history for this message

Wayne Stambaugh (stambaughw) wrote on 2016-01-25: Re: [Bug 1537120] Re: Zones make connection to the pad but still shows net unconnected

Base_Station.kicad_pcb-bak Edit (196.8 KiB, text/plain; charset=UTF-8; name="Base_Station.kicad_pcb-bak")

On 1/25/2016 8:24 AM, Art wrote:
> I get a distinct feeling that one of us have no idea what he is talking
> about. Did you actually open the pcb file? Did you actually look at
> the file I provided?

In the future if want me to help you, please refrain from comments like
this. They serve no purpose helping me understand your problem but
since it appears to me you think I am incompetent please look at the
revisions I made to your board file that resolved the issues.

>
> First of all two areas that I highlighted had nothing to do with P2. P2
> is located in the opposite corner of the board and incidentally it is
> connected to the GND pin.

I'm assuming you want every GND pad on your board to connect to the GND
pin on J2. The problem was that your top plane (GND) copper poor was
broken so you had isolated copper areas. I merely decreased the
clearance from 0.015" to 0.010" of the top GND zone to allow the copper
pour to make connections so that solved the R3 pin 1 connection issue
(Board_1.jpg image).

To solve the issue other issue. I added a trace to the bottom copper
layer from the via you pointed to in Board_2.jpg to one of the GND pads
on U1. This resolves your other missing connection. The reason you
have to add the trace is the the DRC currently doesn't recognize vias
that terminate into zones. In other words the bottom layer GND zone was
not actually connect to GND until the trace was added. This is a known
and I believe documented issue with Pcbnew which will be fixed
(hopefully) during this development cycle.

These changes may not be acceptable to you but they resolve your
connection issues.

>
> Second, U1 wasn't a problem either and I have no idea what you are
> talking about when you say that "non of the GND pins on U1 on the B.Cu
> layer are connected. They all have thermal relief connection and
> connected to the ground plane
>
> If you had time to type up the answer I guess at the very least you
> could study the subject matter of your answer at least a little bit. Do
> you mind actually commenting on the problem areas rather than elsewhere
> on the board?
>
> See pictures attached to illustrate my point
>
> ** Attachment added: "Board_1.jpg"
> https://bugs.launchpad.net/kicad/+bug/1537120/+attachment/4556241/+files/Board_1.jpg
>

On 1/25/2016 8:24 AM, Art wrote:
> I get a distinct feeling that one of us have no idea what he is talking
> about.  Did you actually open the pcb file?  Did you actually look at
> the file I provided?

In the future if want me to help you, please refrain from comments like
this.  They serve no purpose helping me understand your problem but
since it appears to me you think I am incompetent please look at the
revisions I made to your board file that resolved the issues.

> 
> First of all two areas that I highlighted had nothing to do with P2.  P2
> is located in the opposite corner of the board and incidentally it is
> connected to the GND pin.

I'm assuming you want every GND pad on your board to connect to the GND
pin on J2.  The problem was that your top plane (GND) copper poor was
broken so you had isolated copper areas.  I merely decreased the
clearance from 0.015" to 0.010" of the top GND zone to allow the copper
pour to make connections so that solved the R3 pin 1 connection issue
(Board_1.jpg image).

To solve the issue other issue.  I added a trace to the bottom copper
layer from the via you pointed to in Board_2.jpg to one of the GND pads
on U1.  This resolves your other missing connection.  The reason you
have to add the trace is the the DRC currently doesn't recognize vias
that terminate into zones.  In other words the bottom layer GND zone was
not actually connect to GND until the trace was added.  This is a known
and I believe documented issue with Pcbnew which will be fixed
(hopefully) during this development cycle.

These changes may not be acceptable to you but they resolve your
connection issues.

> 
> Second, U1 wasn't a problem either and I have no idea what you are
> talking about when you say that "non of the GND pins on U1 on the B.Cu
> layer are connected.  They all have thermal relief connection and
> connected to the ground plane
> 
> If you had time to type up the answer I guess at the very least you
> could study the subject matter of your answer at least a little bit.  Do
> you mind actually commenting on the problem areas rather than elsewhere
> on the board?
> 
> See pictures attached to illustrate my point
> 
> ** Attachment added: "Board_1.jpg"
>    https://bugs.launchpad.net/kicad/+bug/1537120/+attachment/4556241/+files/Board_1.jpg
>