Comment 3 for bug 1411655

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Hale Wang (hale-wang) wrote :

The combine pass combined the volatile register which caused this bug.

The expected assembler code should be:

  mov r4, .L_temp
  mov r1, r4
  ...
  mov r0, r0 @ r0
  mov r1, r1 @ r1
  mov r2, r2 @ r2

But GCC combined the insns, and the code is generated as:

  mov r4, .L_temp
  ...
  mov r0, r0 @ r0
  mov r4, r4 @ r1
  mov r2, r2 @ r2

The register 'r1' is defined as volatile in this case. It should not be combined.