Comment 1 for bug 1322526

According to Intel's 64-ia-32-architectures-software-developer-vol-3a-3b-system-programming-manual, Section 11.5.1 defines CR0's two bits, NW and CD, that control system-wide catch behaviours, i.e. "If the NW and CD flags are clear, write-back is enabled for the whole of system memory". The definition of CR0 and these two bits can also be found in Section 2.5.