DRC ignores traces crossing edgecut

Bug #1648055 reported by Frank Severinsen
50
This bug affects 9 people
Affects Status Importance Assigned to Milestone
KiCad
Fix Released
Wishlist
Seth Hillbrand

Bug Description

Dear Kicad Developers

I found an issue with the DRC which I think would be worth looking into.
It seems the DRC doesnt check for traces crossing the edgecut.

Currently, the P&S router will happily push a trace out of the edgecut when using the shove mode. (I am also making bug report on this)
for this reason the traces might go out of the outline without the user even noticing it.
I would suppose simply treating the edge cut as any other trace would give a DRC error when crossing the edgecut.
but perhaps having a seperate clearence to edgecut could be nicer since it would allow the traces to go closer.

Though this is pretty easy to inspect manually, I believe the DRC should provide the best possible chance for a functioning board.

tested on 4.0.4 and newest nightly

Greetings Frank Severinsen

Tags: drc pcbnew
Revision history for this message
Frank Severinsen (shack) wrote :
Revision history for this message
Nick Østergaard (nickoe) wrote :

I see what you mean, and I see why this can certainly be a problem. But how do you want to handle cases where people make castellated pads, which is really hald a throughhole pad on the pcb edge.

tags: added: drc
Revision history for this message
Frank Severinsen (a-frank-b) wrote :

@Nick, I think a pretty good way of getting around this would be to allow traces going further than the clearance if the end of the trace is at a pad with the same netname.. It could maybe be enough to only allow traces going of the the outline, but not in again. If the traces goes out of the edge cut clearance it could be for a castellated pad, if it wasn't it would return an unconnected error.. Any thoughts on this?

tags: added: pcbnew
Revision history for this message
Jeff Young (jeyjey) wrote :

@Tomasz, I know you were working on the PNS side of this; are you also working on the DRC side or would you like me to look into it?

Changed in kicad:
milestone: none → 5.0.0-rc2
Revision history for this message
Jon Evans (craftyjon) wrote :

TBH I'm not sure this is a 5.0 thing (or at least to get it completely resolved). I don't think the conditional DRC (to allow for castellated boards) would be a trivial change.

I vote we either bump this to 6.0, or add the simplest possible fix for 5.0: an optional DRC to check tracks against edge cuts. People making castellated boards can either turn the option off or just ignore the errors caused by the castellations.

Revision history for this message
Wayne Stambaugh (stambaughw) wrote : Re: [Bug 1648055] Re: DRC ignores traces crossing edgecut

@Jon, I'm fine with pushing this back to v6. I would rather we didn't
rush a fix for the castellation issue. I'm guessing this would be a
fairly involved fix.

On 3/20/2018 9:24 PM, Jon Evans wrote:
> TBH I'm not sure this is a 5.0 thing (or at least to get it completely
> resolved). I don't think the conditional DRC (to allow for castellated
> boards) would be a trivial change.
>
> I vote we either bump this to 6.0, or add the simplest possible fix for
> 5.0: an optional DRC to check tracks against edge cuts. People making
> castellated boards can either turn the option off or just ignore the
> errors caused by the castellations.
>

Jon Evans (craftyjon)
Changed in kicad:
milestone: 5.0.0-rc2 → 6.0.0-rc1
importance: Undecided → Wishlist
Revision history for this message
Seth Hillbrand (sethh) wrote :

I'm attaching a light patch for this issue for discussion. It does not deal with the castellated pads that need trace connections that go all the way to the board edge. But it does check for contiguous board outlines and traces crossing edges.

Do people think that this needs an optional checkbox?

Revision history for this message
Jeff Young (jeyjey) wrote :

@Seth,

I think you're doubling up on clearance when checking for track collisions with the board edge.

BOARD_CONNECTED_ITEM::GetClearance( BOARD_CONNECTED_ITEM* aItem ) factors in the clearance of *two* items: this and aItem. With both this and aItem equal to aRefSeg, I think it's doubling the clearance.

Since board edges don't have width or clearance (at present), I think you want to pass in nullptr.

I would NOT be inclined to put a separate checkbox in for this.

Revision history for this message
Wayne Stambaugh (stambaughw) wrote :

@Seth, I just tested your patch and it seems to work well. Did you get a chance to address @Jeff's concerns about doubling the clearance? Once you address that, I'm fine with merging this patch as part of 5.1.

Revision history for this message
KiCad Janitor (kicad-janitor) wrote :

Fixed in revision 26765161c1c0693d3a490a84004ab00ef68013d2
https://git.launchpad.net/kicad/patch/?id=26765161c1c0693d3a490a84004ab00ef68013d2

Changed in kicad:
status: New → Fix Committed
assignee: nobody → Seth Hillbrand (sethh)
Revision history for this message
Seth Hillbrand (sethh) wrote :

Thanks Wayne and Jeff. I've adjusted the patch to correctly use the segment clearance rather than just using the crossing.

Frank Severinsen (shack)
Changed in kicad:
status: Fix Committed → Fix Released
Revision history for this message
Michael Kavanagh (michaelkavanagh) wrote :

This was released in 5.1.0.

Changed in kicad:
milestone: 6.0.0-rc1 → none
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