filled zone clearance influenced by edge.cuts line width
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
KiCad |
Won't Fix
|
Undecided
|
Unassigned |
Bug Description
tested and confirmed in:
KiCAD BZR 6097, in module pcbnew
KiCAD 4.0.0 RC1, in module pcbnew
A copper pour zone that goes to/over a board outside definition has a clearance setting which allows to define a clear space between the board edge and the copper pour.
The board edge is defined as the center of the graphic lines on the edge.cuts layer.
The problem is that the zone fill clearance setting doesn't use the center of the edge.cuts graphics lines, but the edge of those lines that is closest to it (madworm: I suspect the code doesn't care what object is in the way, be it a track or line).
Undesired result - changing the width of those lines affects the zone pour.
For screenshots and more see this link on KiCAD.info:
https:/
Where is the bug?
"The board edge is defined as the center of the graphic lines on the edge.cuts layer."
I already saw other definitions. This is therefore not alway true, although it is the more usual definition.