Tracks on the outline layer can cause shorts.

[Traumflug]

Up front: I vaguely remember there was a similar bug, but I can't find it.

The bug is, lines on the outline layer are obviously taken into account when looking up connections. For example with 'Menu -> Connects -> Lookup connection' or with 'Menu -> Connects -> Optimize rats nest'.

Sample attached. There are six lines on the outline layer, four for the old board size and two additional ones for the planned, smaller new board size. Optimizing rats nest brings up some 50 shorts. All shorts vanish when the two lines on the outline layer marking the smaller board size are removed. The outline layer is in its own group.

[Traumflug (mah-jump-ing)]

After some investigation I think I've found the problem: It's true that connects are searched on one layer group, only, but as soon as a track connects to a pin or via, this no longer plays a role. Because pins/vias connect to all layers, no matter which group.

Now, instead of adding more band-aid and making the stuff in find.c aware of layers with specific names, I think it's better to invest into a more general solution. That would be the introduction of layers which are neither copper nor silk.

A few steps in this direction implemented and pushed to branch LP1492966: http://git.geda-project.org/pcb/log/?h=LP1492966

The stack of layers distinguishes now not only copper and silk, but copper, non-copper and silk layers. Non-copper layers are detected by their name, then moved at the end of non-silk layers, the number of copper layers decremented. No changes in operation other than the rearrangement of the layers, yet.

[Traumflug (mah-jump-ing)]

Depends on https://bugs.launchpad.net/pcb/+bug/1493557

[Bert Timmerman (bert-timmerman)]

Hi,

Outline layer behaves like a copper layer, no special treatment yet.

I consider this a wish list item for a "next feature release".

Kind regards,

Bert Timmerman.