Polygon output differs in Gerber from PCB

[David Mosberger]

We got hit by an apparent corner case in polygon handling: PCB shows the desired layout, but the generated Gerber file doesn't match what PCB is showing and causes traces to be shorted. Please see the attached screenshot to see the issue: the three diagonal traces on the left show as nicely separated traces in PCB, but in the Gerber file, the three traces are shorted out.

We're seeing this problem with PCB version 20110918 as distributed in Ubuntu 12.04.1 LTS.

[David Mosberger (r-davidm)]

Here is the PCB file reproducing the problem.

I forgot to mention that we're seeing this problem with PCB version 20110918 as distributed in Ubuntu 12.04.1 LTS.

[Peter Clifton (pcjc2)]

The GTK+GL GUI uses a different (and more optimised) rendering path for polygons than the gerber export.

To reproduce this problem on-screen, use the lesstif HID, compile without GL support or apply this patch:

diff --git a/src/hid/gtk/gtkhid-gl.c b/src/hid/gtk/gtkhid-gl.c
index 9124ba5..fb6f948 100644
--- a/src/hid/gtk/gtkhid-gl.c
+++ b/src/hid/gtk/gtkhid-gl.c
@@ -790,7 +790,7 @@ ghid_init_renderer (int *argc, char ***argv, GHidPort *port)

   /* Setup HID function pointers specific to the GL renderer*/
   ghid_hid.end_layer = ghid_end_layer;
- ghid_graphics.fill_pcb_polygon = ghid_fill_pcb_polygon;
+// ghid_graphics.fill_pcb_polygon = ghid_fill_pcb_polygon;
   ghid_graphics.thindraw_pcb_polygon = ghid_thindraw_pcb_polygon;
 }

[Peter Clifton (pcjc2)]

Incidentally, this is still reporoducable in git HEAD

[Peter Clifton (pcjc2)]

AND... it appears to be that it might be the GL renderer which is incorrect here.

The lines which are shorted out are missing the "clearline" flag, which causes them to clear away polygons.

[Peter Clifton (pcjc2)]

RIGHT... sorry for the bug-spam, I should really do all my diagnostics before posting!

The real problem with your board fragment is that the polygon has the "fullpoly" flag set. This means that the dicer does not throw away the isolated cut-out pieces of a polygon, rather keeps them for rendering and output. (This is a throw-back to PCB's old polygon handling, which was purely graphical).

The GL renderer does not correctly handle "fullpoly" polygons, it basically treats them as if the flag was not set, and does not render the other pieces. This is a BUG, especially since as you have seen, the gerber exporter does handle these correctly. (The PS exporter does not, probably due to a common author of that code-path and the GL one - ME.. sorry!).

I shuold warn you about "fullpoly" polygons though...

"fullpoly" polygons do NOT connectivity-scan correctly. Only the main (largest) cut piece from the polygon will be identified as connected to other coper objects when you hit "f" on them. For example, with the above patch applied, I see your short, yet if I hit "f" over one of your three lines, it does not show a connection to the errant piece of polygon.

The reason the "fullpoly" polygon has caused you issues is that a number of your tracks are missing the "clearline" flag. This causes them to join with polygons. Were it not for the surrounding geometry of pads with clearances, and tracks with clearances, these lines would (correctly - as you have told them to) join with the polygon.

So.. in summary - to fix your design, remove the "fullpoly" flag, Ensure you set the "clearline" flag on every line you don't want to short to the polygon, just incase you move something and the lines missing that flag then have an opportunity to re-connect with the polygon.

There clearly IS a bug here.. (the GL and PS renderers don't support "fullpoly" polygons properly). I hope this did not cause you too much invonvenience already... thanks for reporting it!

[David Mosberger (r-davidm)]

Yes, the clearline flag on this lines is missing because there was on way
to tell that they were missing: the traces looked fine, optimize rats nest
didn't report any shorts, and neither did DRC. It was easy to fix the
problem by turning on the clearline flags on the lines in question, but of
course we didn't find the problem until after we built a bunch of those
boards, so there is a real problem here.

  --david

On Wed, Dec 12, 2012 at 2:59 PM, Peter Clifton <
<email address hidden>> wrote:

> AND... it appears to be that it might be the GL renderer which is
> incorrect here.
>
> The lines which are shorted out are missing the "clearline" flag, which
> causes them to clear away polygons.
>
> --
> You received this bug notification because you are subscribed to the bug
> report.
> https://bugs.launchpad.net/bugs/1089532
>
> Title:
> Polygon output differs in Gerber from PCB
>
> Status in PCB: Printed Circuit Board CAD package:
> New
>
> Bug description:
> We got hit by an apparent corner case in polygon handling: PCB shows
> the desired layout, but the generated Gerber file doesn't match what
> PCB is showing and causes traces to be shorted. Please see the
> attached screenshot to see the issue: the three diagonal traces on the
> left show as nicely separated traces in PCB, but in the Gerber file,
> the three traces are shorted out.
>
> We're seeing this problem with PCB version 20110918 as distributed in
> Ubuntu 12.04.1 LTS.
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/pcb/+bug/1089532/+subscriptions
>

--
eGauge Systems LLC, http://egauge.net/, 1.877-EGAUGE1, fax [phone]

[David Mosberger (r-davidm)]

Peter,

That's interesting. I wasn't aware of the "fullpoly" flag. I do see that
my board has setting "New polygons are full ones". I have no recollection
of turning this on intentionally and of 42 polygons, only 2 have the
"fullpoly" flag set. I'll definitely clear the fullpoly flag on the polygon
in question and will check on the other one whether there was a reason to
have it turned on (I'm guessing not). We were actually wondering how to
remove those pesky islands (dead copper), so you just answered that
question, too, thanks!

  --david

On Wed, Dec 12, 2012 at 3:14 PM, Peter Clifton <
<email address hidden>> wrote:

> RIGHT... sorry for the bug-spam, I should really do all my diagnostics
> before posting!
>
> The real problem with your board fragment is that the polygon has the
> "fullpoly" flag set. This means that the dicer does not throw away the
> isolated cut-out pieces of a polygon, rather keeps them for rendering
> and output. (This is a throw-back to PCB's old polygon handling, which
> was purely graphical).
>
> The GL renderer does not correctly handle "fullpoly" polygons, it
> basically treats them as if the flag was not set, and does not render
> the other pieces. This is a BUG, especially since as you have seen, the
> gerber exporter does handle these correctly. (The PS exporter does not,
> probably due to a common author of that code-path and the GL one - ME..
> sorry!).
>
> I shuold warn you about "fullpoly" polygons though...
>
> "fullpoly" polygons do NOT connectivity-scan correctly. Only the main
> (largest) cut piece from the polygon will be identified as connected to
> other coper objects when you hit "f" on them. For example, with the
> above patch applied, I see your short, yet if I hit "f" over one of your
> three lines, it does not show a connection to the errant piece of
> polygon.
>
>
> The reason the "fullpoly" polygon has caused you issues is that a number
> of your tracks are missing the "clearline" flag. This causes them to join
> with polygons. Were it not for the surrounding geometry of pads with
> clearances, and tracks with clearances, these lines would (correctly - as
> you have told them to) join with the polygon.
>
>
> So.. in summary - to fix your design, remove the "fullpoly" flag, Ensure
> you set the "clearline" flag on every line you don't want to short to the
> polygon, just incase you move something and the lines missing that flag
> then have an opportunity to re-connect with the polygon.
>
> There clearly IS a bug here.. (the GL and PS renderers don't support
> "fullpoly" polygons properly). I hope this did not cause you too much
> invonvenience already... thanks for reporting it!
>
> ** Changed in: pcb
> Status: New => Confirmed
>
> ** Changed in: pcb
> Importance: Undecided => Critical
>
> ** Changed in: pcb
> Assignee: (unassigned) => Peter Clifton (pcjc2)
>
> --
> You received this bug notification because you are subscribed to the bug
> report.
> https://bugs.launchpad.net/bugs/1089532
>
> Title:
> Polygon output differs in Gerber from PCB
>
> Status in PCB: Printed Circuit Board CAD package:
> Confirmed
>
> Bug description:
> We got hit by an ...

[Peter Clifton (pcjc2)]

The "fullpoly" flag should come with a big fat health warning, as those islands present a real risk of unidentified connection paths. (PCB's connection code doesn't see them).

I have development code which can fix this problem, but it is a long way from being merged. For now, though - we need to fix rendering in the GL renderer and the PS exporter, so we don't make the shorts _impossible_ to spot!

[David Mosberger (r-davidm)]

Yes, that would be a good improvement.

Thanks for all the great work on pcb! Let me know if there is anything I
can help with.

  --david

On Wed, Dec 12, 2012 at 4:18 PM, Peter Clifton <
<email address hidden>> wrote:

> The "fullpoly" flag should come with a big fat health warning, as those
> islands present a real risk of unidentified connection paths. (PCB's
> connection code doesn't see them).
>
> I have development code which can fix this problem, but it is a long way
> from being merged. For now, though - we need to fix rendering in the GL
> renderer and the PS exporter, so we don't make the shorts _impossible_
> to spot!
>
> --
> You received this bug notification because you are subscribed to the bug
> report.
> https://bugs.launchpad.net/bugs/1089532
>
> Title:
> Polygon output differs in Gerber from PCB
>
> Status in PCB: Printed Circuit Board CAD package:
> Confirmed
>
> Bug description:
> We got hit by an apparent corner case in polygon handling: PCB shows
> the desired layout, but the generated Gerber file doesn't match what
> PCB is showing and causes traces to be shorted. Please see the
> attached screenshot to see the issue: the three diagonal traces on the
> left show as nicely separated traces in PCB, but in the Gerber file,
> the three traces are shorted out.
>
> We're seeing this problem with PCB version 20110918 as distributed in
> Ubuntu 12.04.1 LTS.
>
> To manage notifications about this bug go to:
> https://bugs.launchpad.net/pcb/+bug/1089532/+subscriptions
>

--
eGauge Systems LLC, http://egauge.net/, 1.877-EGAUGE1, fax [phone]

[gpleda.org commit robot (gpleda-launchpad-robot)]

A commit was made which affects this bug
git master commit 8ca2c0e581dd160a4124df7187255b8a07cc959f
http://git.geda-project.org/pcb/commit/?id=8ca2c0e581dd160a4124df7187255b8a07cc959f

commit 8ca2c0e581dd160a4124df7187255b8a07cc959f
Author: Peter Clifton <email address hidden>
Commit: Peter Clifton <email address hidden>

    hid/ps: Add support for rendering "fullpoly" polygons

    Affects-bug: lp-1089532

[gpleda.org commit robot (gpleda-launchpad-robot)]

A commit was made which affects this bug
git master commit e346f29fd102595ff153e8ef723e3200579abb95
http://git.geda-project.org/pcb/commit/?id=e346f29fd102595ff153e8ef723e3200579abb95

commit e346f29fd102595ff153e8ef723e3200579abb95
Author: Peter Clifton <email address hidden>
Commit: Peter Clifton <email address hidden>

    hid/common/draw_helpers.c: Fix thindraw for "fullpoly" polygons

    Affects-bug: lp-1089532

[gpleda.org commit robot (gpleda-launchpad-robot)]

A commit was made which affects this bug
git master commit e89b30f88aa6e9429d52dd27a12d0ed7f5ccc8e5
http://git.geda-project.org/pcb/commit/?id=e89b30f88aa6e9429d52dd27a12d0ed7f5ccc8e5

commit e89b30f88aa6e9429d52dd27a12d0ed7f5ccc8e5
Author: Peter Clifton <email address hidden>
Commit: Peter Clifton <email address hidden>

    hid/common/hidgl.c: Add support for rendering "fullpoly" polygons

    This finally bit someone (and eneded up with them producing
    a bad batch of boards), so it is about time I fixed this.

    Affects-bug: lp-1089532