Comment 1 for bug 1792174

Skipped:
* "x86/paravirt: Fix spectre-v2 mitigations for paravirt
  guests (CVE-2018-15594)
* "x86/speculation: Protect against userspace-userspace
  spectreRSB" (CVE-2018-15572)

Skipped patches from L1TF (CVE-2018-3620, CVE-2018-3646):
* "x86/speculation/l1tf: Increase 32bit PAE
  __PHYSICAL_PAGE_SHIFT"
* "x86/mm: Move swap offset/type up in PTE to work around
  erratum"
* "x86/mm: Fix swap entry comment and macro"
* "x86/speculation/l1tf: Change order of offset/type in
  swap entry"
* "x86/speculation/l1tf: Protect swap entries against L1TF"
* "x86/speculation/l1tf: Protect PROT_NONE PTEs against
  speculation"
* "x86/speculation/l1tf: Make sure the first page is
  always reserved"
* "x86/speculation/l1tf: Add sysfs reporting for l1tf"
* "x86/speculation/l1tf: Disallow non privileged high MMIO
  PROT_NONE mappings"
* "x86/speculation/l1tf: Limit swap file size to MAX_PA/2"
* "x86/bugs: Move the l1tf function and define pr_fmt
  properly"
* "x86/speculation/l1tf: Extend 64bit swap file size limit"
* "x86/cpufeatures: Add detection of L1D cache flush
  support."
* "x86/speculation/l1tf: Protect PAE swap entries against
  L1TF"
* "x86/speculation/l1tf: Fix up pte->pfn conversion for
  PAE"
* "x86/speculation/l1tf: Invert all not present mappings"
* "x86/speculation/l1tf: Make pmd/pud_mknotpresent()
  invert"
* "x86/mm/pat: Make set_memory_np() L1TF safe"
* "x86/speculation/l1tf: Fix up CPU feature flags"
* "x86/speculation/l1tf: Unbreak
  !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures"

Modified "mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1" to do the changes to arch/x86/include/asm/pgtable_types.h only (because changes to arch/x86/include/asm/pgtable_64.h were already present).