--- linux-ec2-2.6.32.orig/arch/x86/kernel/cpu/intel.c	2011-03-02 08:15:16.000000000 +0000
+++ linux-ec2-2.6.32.hero/arch/x86/kernel/cpu/intel.c	2011-03-02 08:15:20.000000000 +0000
@@ -82,6 +82,7 @@
 	    && (c->x86_mask == 0x3 || c->x86_mask == 0x4))
 		c->x86_phys_bits = 36;

+#ifndef CONFIG_XEN
 	/*
 	 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
 	 * with P/T states and does not stop in deep C-states.
@@ -92,11 +93,10 @@
 	if (c->x86_power & (1 << 8)) {
 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
-#ifndef CONFIG_XEN
 		if (!check_tsc_unstable())
-#endif
 			sched_clock_stable = 1;
 	}
+#endif

 	/*
 	 * There is a known erratum on Pentium III and Core Solo