This bug was fixed in the package linux-armadaxp - 3.2.0-1612.17 --------------- linux-armadaxp (3.2.0-1612.17) precise-proposed; urgency=low [ Jani Monoses ] * Release Tracking Bug -LP: #1087212 * Rebase on Ubuntu-3.2.0-35.55 and add B0 support. * [Config] Config updates for ArmadaXP B0. * Uncomment MACHINE_START entry for ARMADA_XP_RDSRV [ Upstream Kernel Changes ] * DSMP cleanup to be able to compile without IO coherancy, compile time errors found, and needed to get fixed * OSS: Multi-line cache operations update * OSS: fix multi-line operations align address and size from KW2 * Add macros for NFP rate limiting support * DSMP fixing the nameing in arch/arm/mm/proc-sheeva_pj4bv7.S * Clear ldstm workarounf in case No errata * This patch adds the MMU initialisation for the LPAE page table format. The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new proc-v7lpae.S file contains the initialisation, context switch and save/restore code for ARMv7 with the LPAE. The TTBRx split is based on the PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings (supersections) and a few other memory types in mmu.c are conditionally compiled. by Catalin Marinas