verilog 0.9.6-1 (arm64 binary) in ubuntu saucy

 Icarus Verilog is intended to compile all of the Verilog HDL as
 described in the IEEE-1364 standard. It is not quite there
 yet. It does currently handle a mix of structural and behavioral
 constructs.
 .
 The compiler can target either simulation, or netlist (EDIF).
 .
 This is a dummy transitional package that will ensure a proper upgrade path.
 This package may be safely removed after upgrading.