PCC CPUFREQ driver does not load by default
Bug #1061126 reported by
Leann Ogasawara
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
linux (Ubuntu) |
Fix Released
|
Medium
|
Leann Ogasawara | ||
Precise |
Won't Fix
|
Medium
|
Unassigned | ||
Quantal |
Fix Released
|
Medium
|
Leann Ogasawara |
Bug Description
PCC CPUFREQ driver does not load by default on HP ProLiant platform. If we load it manually all feature works fine. This bug is created to fix the same.
Steps to reproduce:
Install the Precise on HP ProLiant hardware.
do lsmod | grep cpufreq -- no driver
check /sys/devices/
Changed in linux (Ubuntu): | |
assignee: | nobody → Leann Ogasawara (leannogasawara) |
importance: | Undecided → Medium |
status: | New → In Progress |
Changed in linux (Ubuntu Precise): | |
importance: | Undecided → Medium |
Changed in linux (Ubuntu Quantal): | |
status: | In Progress → Fix Committed |
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This bug was fixed in the package linux - 3.5.0-17.26
---------------
linux (3.5.0-17.26) quantal-proposed; urgency=low
[ David Henningsson ]
* SAUCE: ALSA: hda - fix indices on boost volume on Conexant
- LP: #1059523
[ Leann Ogasawara ]
* [Config] Build in CONFIG_ X86_PCC_ CPUFREQ= y
- LP: #1061126
[ Rob Herring ]
* Revert "SAUCE: ahci_platform: add custom hard reset for Calxeda ahci
ctrlr"
- LP: #1059432
* Revert "SAUCE: net: calxedaxgmac: add write barriers around setting
owner bit"
- LP: #1059432
* Revert "SAUCE: ARM: highbank: use writel_relaxed variant for pwr
requests"
- LP: #1059432
* Revert "SAUCE: force DMA buffers to non-bufferable on highbank"
- LP: #1059432
* Revert "SAUCE: input: add a key driver for highbank"
- LP: #1059432
* [Config] Align highbank config with amd64-generic and add new configs
- LP: #1059432
* SAUCE: net: calxedaxgmac: enable operate on 2nd frame mode
- LP: #1059432
* SAUCE: net: calxedaxgmac: remove explicit rx dma buffer polling
- LP: #1059432
* SAUCE: net: calxedaxgmac: use relaxed i/o accessors in rx and tx paths
- LP: #1059432
* SAUCE: net: calxedaxgmac: drop some unnecessary register writes
- LP: #1059432
* SAUCE: net: calxedaxgmac: rework transmit ring handling
- LP: #1059432
* SAUCE: ARM: highbank: retry wfi on reset request
- LP: #1059432
[ Tim Gardner ]
* [Config] TIDSPBRIDGE=m
- LP: #1058022
* rebase to v3.5.5
[ Upstream Kernel Changes ]
* common: DMA-mapping: add DMA_ATTR_ NO_KERNEL_ MAPPING attribute SKIP_CPU_ SYNC attribute SKIP_CPU_ SYNC attribute TX_LENGTH quirk warning.
- LP: #1059432
* common: DMA-mapping: add DMA_ATTR_
- LP: #1059432
* ARM: dma-mapping: add support for DMA_ATTR_
- LP: #1059432
* ARM: add coherent dma ops
- LP: #1059432
* ARM: add coherent iommu dma ops
- LP: #1059432
* ARM: highbank: add coherent DMA setup
- LP: #1059432
* sata: add platform driver for Calxeda AHCI controller
- LP: #1059432
* xhci: Rate-limit XHCI_TRUST_
- LP: #1039478
* agp/intel-gtt: remove dead code
- LP: #1011440
* drm/i915: stop using dev->agp->base
- LP: #1011440
* agp/intel-gtt: don't require the agp bridge on setup
- LP: #1011440
* drm/i915 + agp/intel-gtt: prep work for direct setup
- LP: #1011440
* agp/intel-gtt: move gart base addres setup
- LP: #1011440
* drm/i915: don't use dev->agp
- LP: #1011440
* drm/i915: disable drm agp support for !gen3 with kms enabled
- LP: #1011440
* agp/intel-agp: remove snb+ host bridge pciids
- LP: #1011440
* rebase to v3.5.5
- LP: #1000424
-- Leann Ogasawara <email address hidden> Wed, 03 Oct 2012 11:11:18 -0700