iverilog binary package in Ubuntu Noble amd64
Icarus Verilog is intended to compile all of the Verilog HDL as
described in the IEEE-1364 standard. It is not quite there
yet. It does currently handle a mix of structural and behavioral
constructs.
.
The compiler can target either simulation, or netlist (EDIF).
Publishing history
Date | Status | Target | Component | Section | Priority | Phased updates | Version | ||
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2024-04-03 13:11:29 UTC | Published | Ubuntu Noble amd64 | release | universe | electronics | Optional | 12.0-2build2 | ||
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Deleted | Ubuntu Noble amd64 | proposed | universe | electronics | Optional | 12.0-2build2 | |||
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Deleted | Ubuntu Noble amd64 | updates | universe | electronics | Optional | 12.0-2 | |||
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2024-03-30 06:10:16 UTC | Deleted | Ubuntu Noble amd64 | release | universe | electronics | Optional | 12.0-2build1 | ||
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2024-03-30 06:10:16 UTC | Deleted | Ubuntu Noble amd64 | proposed | universe | electronics | Optional | 12.0-2build1 | ||
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2024-03-29 03:56:46 UTC | Superseded | Ubuntu Noble amd64 | release | universe | electronics | Optional | 12.0-2 | ||
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