verilator binary package in Ubuntu Focal arm64
Verilator is the fastest free Verilog HDL simulator, and beats many commercial
simulators. It compiles synthesizable Verilog (not test-bench code!), plus
some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code.
It is designed for large projects where fast simulation performance is of
primary concern, and is especially well suited to generate executable models
of CPUs for embedded software design teams.
Publishing history
Date | Status | Target | Component | Section | Priority | Phased updates | Version | ||
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2020-02-10 02:28:12 UTC | Published | Ubuntu Focal arm64 | release | universe | electronics | Optional | 4.028-1 | ||
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Deleted | Ubuntu Focal arm64 | proposed | universe | electronics | Optional | 4.028-1 | |||
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2020-02-10 02:28:17 UTC | Superseded | Ubuntu Focal arm64 | release | universe | electronics | Optional | 4.026-1 | ||
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2020-02-11 06:10:11 UTC | Deleted | Ubuntu Focal arm64 | proposed | universe | electronics | Optional | 4.026-1 | ||
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2020-01-12 12:53:15 UTC | Superseded | Ubuntu Focal arm64 | release | universe | electronics | Optional | 4.024-1 | ||
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2020-01-13 18:10:08 UTC | Deleted | Ubuntu Focal arm64 | proposed | universe | electronics | Optional | 4.024-1 | ||
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2019-12-20 11:58:15 UTC | Superseded | Ubuntu Focal arm64 | release | universe | electronics | Optional | 4.020-1 | ||
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2019-12-21 12:10:08 UTC | Deleted | Ubuntu Focal arm64 | proposed | universe | electronics | Optional | 4.020-1 | ||
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2019-10-26 10:04:55 UTC | Superseded | Ubuntu Focal arm64 | release | universe | electronics | Optional | 4.016-3 | ||
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