WORKING This is a comment summarising a bit the statement of work in this bug: Bellow are the commits (and the merge requests they came from) that I could identify by the previous comments. Judging by the selected commits, the intent is to allow MSR supportability to be queried by guest through CPUID MSR query emulation <-> kvm ioctls interface. Every feature to be reported has to have its MSR declared for the CPU type to be used AND the kvm ioctl backend + kernel support (to query the actual hardware). (1) Request is to allow the following features to be reported by QEMU/KVM: CPUID.(EAX=7H,ECX=0):EDX[26] (Enable/Disable IBRS/IBPB feature flag): Enumerates support for indirect branch restricted speculation (IBRS) and the indirect branch predictor barrier (IBPB). Processors that set this bit support the IA32_SPEC_CTRL MSR and the IA32_PRED_CMD MSR. They allow software to set IA32_SPEC_CTRL[0] (IBRS) and IA32_PRED_CMD[0] (IBPB). and CPUID.(EAX=7H,ECX=0):EDX[29] (IA32_ARCH_CAPABILITIES feature flag) Enumerates support for the IA32_ARCH_CAPABILITIES MSR, allowing MSR index 10AH to be read: - (bit 0) RDCL_NO: not susceptible to rogue data cache - (bit 1) IBRS_ALL: processor supports IBRS - (bit 2) RSBA: processor supports RSB alternate (retpol off) - (bit 3) SKIP_L1DFL_VMENTRY: vm entry don't flush L1D on VM entry - (bit 4) SSB_NO: processor not susceptible to spec store bypass (2) There is *no current request* to allow following features to be reported by EAX_7H_ECX_0_EDX QEMU/KVM right now: * CPUID.(EAX=7H,ECX=0):EDX[27] STIBP support flag. * CPUID.(EAX=7H,ECX=0):EDX[28] L1D_FLUSH support flag. * CPUID.(EAX=7H,ECX=0):EDX[31] SSBD support flag. OBS: I haven't checked patch dependencies yet, not sure if more patches are needed yet, just realized that SSBD support flag wasn't being asked to be backported (nor present in 2.11 version, Bionic version which we are targetting this to). That explains the small "statement of work" above. For now the request was fully understood: I'll work tomorrow in a backport attempt to check if big pieces in between 2.11 and something around the v3.0.0-152-g8c80c99fcc .. v4.0.0-rc0-2-g014018e19b range are missing that would require a major refactoring that would not be possible to be done. (3) Possible points of pain: - arch_capabilities unmigratable flag inside cpu data structure (while CPUID was being developed) turned later on into migratable later. - data structure changes to support MSR based features. QEMU: ######## MERGE REQUEST 21ee4787e53367590f284915bf4c30c684e65bdf 174a78a8a5c0cf421236fe14efc5559717f050df bb4928c7cafe50ab2137a0034e350ef1bfa044d9 014018e19b3c54dd1bf5072bc912ceffea40abe8 + 485b1d256bcb0874bcde0223727c159b6837e6f8 + commit 014018e19b3c54dd1bf5072bc912ceffea40abe8 - v4.0.0-rc0-2-g014018e19b Author: Eduardo Habkost