I've successfully verified that this issue is resolved after updating to -proposed:
thunderx2 imp def: bus_access_rd [Bus access read] bus_access_wr [Bus access write] l1d_cache_rd [L1D cache read] l1d_cache_refill_rd [L1D cache refill read] l1d_cache_refill_wr [L1D refill write] l1d_cache_wr [L1D cache write] l1d_tlb_rd [L1D tlb read] l1d_tlb_refill_rd [L1D tlb refill read] l1d_tlb_refill_wr [L1D tlb refill write] l1d_tlb_wr [L1D tlb write]
Linux ubuntu 4.13.0-38-generic #43~16.04.1-Ubuntu SMP Wed Mar 14 17:49:43 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux
I've successfully verified that this issue is resolved after updating to -proposed:
thunderx2 imp def: refill_ rd refill_ wr
bus_access_rd
[Bus access read]
bus_access_wr
[Bus access write]
l1d_cache_rd
[L1D cache read]
l1d_cache_
[L1D cache refill read]
l1d_cache_
[L1D refill write]
l1d_cache_wr
[L1D cache write]
l1d_tlb_rd
[L1D tlb read]
l1d_tlb_refill_rd
[L1D tlb refill read]
l1d_tlb_refill_wr
[L1D tlb refill write]
l1d_tlb_wr
[L1D tlb write]
Linux ubuntu 4.13.0-38-generic #43~16.04.1-Ubuntu SMP Wed Mar 14 17:49:43 UTC 2018 aarch64 aarch64 aarch64 GNU/Linux