diff -uNp src.old/common.h src/common.h --- src.old/common.h 2007-04-19 13:43:08.000000000 -0500 +++ src/common.h 2007-07-03 02:05:26.000000000 -0500 @@ -358,6 +358,21 @@ extern int I810_DEBUG; #define PCI_CHIP_I965_GM_BRIDGE 0x2A00 #endif +#ifndef PCI_CHIP_G33_G +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_G33_G_BRIDGE 0x29C0 +#endif + +#ifndef PCI_CHIP_Q35_G +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q35_G_BRIDGE 0x29B0 +#endif + +#ifndef PCI_CHIP_Q33_G +#define PCI_CHIP_Q33_G 0x29D2 +#define PCI_CHIP_Q33_G_BRIDGE 0x29D0 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -375,7 +390,8 @@ extern int I810_DEBUG; #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM) #define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM) #define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810)) +#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G || pI810->PciInfo->chipType == PCI_CHIP_Q35_G || pI810->PciInfo->chipType == PCI_CHIP_Q33_G) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810)) diff -uNp src.old/i810_driver.c src/i810_driver.c --- src.old/i810_driver.c 2007-03-30 14:10:17.000000000 -0500 +++ src/i810_driver.c 2007-07-03 02:05:26.000000000 -0500 @@ -145,6 +145,9 @@ static SymTabRec I810Chipsets[] = { {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, + {PCI_CHIP_G33_G, "G33"}, + {PCI_CHIP_Q35_G, "Q35"}, + {PCI_CHIP_Q33_G, "Q33"}, {-1, NULL} }; @@ -169,6 +172,9 @@ static PciChipsets I810PciChipsets[] = { {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, + {PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA}, + {PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA}, + {PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED } }; @@ -614,6 +620,9 @@ I810Probe(DriverPtr drv, int flags) case PCI_CHIP_I965_Q: case PCI_CHIP_I946_GZ: case PCI_CHIP_I965_GM: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: xf86SetEntitySharable(usedChips[i]); /* Allocate an entity private if necessary */ diff -uNp src.old/i810_reg.h src/i810_reg.h --- src.old/i810_reg.h 2007-03-30 14:10:17.000000000 -0500 +++ src/i810_reg.h 2007-07-03 02:05:26.000000000 -0500 @@ -525,6 +525,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN #define PGETBL_SIZE_512KB (0 << 1) #define PGETBL_SIZE_256KB (1 << 1) #define PGETBL_SIZE_128KB (2 << 1) +#define G33_PGETBL_SIZE_MASK (3 << 8) +#define G33_PGETBL_SIZE_1M (1 << 8) +#define G33_PGETBL_SIZE_2M (2 << 8) /** @defgroup PGE_ERR * @{ @@ -1980,7 +1983,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN #define I830_GMCH_MEM_64M 0x1 #define I830_GMCH_MEM_128M 0 -#define I830_GMCH_GMS_MASK 0x70 +#define I830_GMCH_GMS_MASK 0xF0 #define I830_GMCH_GMS_DISABLED 0x00 #define I830_GMCH_GMS_LOCAL 0x10 #define I830_GMCH_GMS_STOLEN_512 0x20 @@ -2000,6 +2003,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) #define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4) +#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) +#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) #define I85X_CAPID 0x44 #define I85X_VARIANT_MASK 0x7 diff -uNp src.old/i830_common.h src/i830_common.h --- src.old/i830_common.h 2007-03-17 19:22:06.000000000 -0500 +++ src/i830_common.h 2007-07-03 02:05:26.000000000 -0500 @@ -54,7 +54,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define DRM_I830_DESTROY_HEAP 0x0c #define DRM_I830_SET_VBLANK_PIPE 0x0d #define DRM_I830_GET_VBLANK_PIPE 0x0e - +#define DRM_I830_HWS_PAGE_ADDR 0x11 typedef struct { enum { @@ -224,4 +224,8 @@ typedef struct { int pipe; } drmI830VBlankPipe; +typedef struct { + uint64_t addr; +} drmI830HWS; + #endif /* _I830_DRM_H_ */ diff -uNp src.old/i830_dri.c src/i830_dri.c --- src.old/i830_dri.c 2007-04-02 16:20:06.000000000 -0500 +++ src/i830_dri.c 2007-07-03 02:05:26.000000000 -0500 @@ -232,6 +232,22 @@ I830SetParam(ScrnInfoPtr pScrn, int para return TRUE; } + static Bool +I830SetHWS(ScrnInfoPtr pScrn, int addr) +{ + I830Ptr pI830 = I830PTR(pScrn); + drmI830HWS hws; + + hws.addr = addr; + + if (drmCommandWrite(pI830->drmSubFD, DRM_I830_HWS_PAGE_ADDR, + &hws, sizeof(drmI830HWS))) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "G33 status page initialization Failed\n"); + return FALSE; + } + return TRUE; +} static Bool I830InitVisualConfigs(ScreenPtr pScreen) @@ -924,6 +940,13 @@ I830DRIDoMappings(ScreenPtr pScreen) return FALSE; } + if (IS_G33CLASS(pI830)) { + if (!I830SetHWS(pScrn, pI830->hw_status->offset)) { + DRICloseScreen(pScreen); + return FALSE; + } + } + /* init to zero to be safe */ sarea->front_handle = 0; sarea->back_handle = 0; diff -uNp src.old/i830_driver.c src/i830_driver.c --- src.old/i830_driver.c 2007-04-19 15:38:51.000000000 -0500 +++ src/i830_driver.c 2007-07-03 02:05:26.000000000 -0500 @@ -234,6 +234,9 @@ static SymTabRec I830Chipsets[] = { {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, + {PCI_CHIP_G33_G,"G33"}, + {PCI_CHIP_Q35_G,"Q35"}, + {PCI_CHIP_Q33_G,"Q33"}, {-1, NULL} }; @@ -252,6 +255,9 @@ static PciChipsets I830PciChipsets[] = { {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA}, {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, + {PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA}, + {PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA}, + {PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; @@ -432,6 +438,19 @@ I830DetectMemory(ScrnInfoPtr pScrn) default: FatalError("Unknown GTT size value: %08x\n", (int)INREG(PGETBL_CTL)); } + } else if (IS_G33CLASS(pI830)) { + /* G33's GTT size is detect in GMCH_CTRL */ + switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) { + case G33_PGETBL_SIZE_1M: + gtt_size = 1024; + break; + case G33_PGETBL_SIZE_2M: + gtt_size = 2048; + break; + default: + FatalError("Unknown GTT size value: %08x\n", + (int)(gmch_ctrl & G33_PGETBL_SIZE_MASK)); + } } else { /* Older chipsets only had GTT appropriately sized for the aperture. */ gtt_size = pI830->FbMapSize / (1024*1024); @@ -469,6 +488,14 @@ I830DetectMemory(ScrnInfoPtr pScrn) if (IS_I9XX(pI830)) memsize = MB(64) - KB(range); break; + case G33_GMCH_GMS_STOLEN_128M: + if (IS_G33CLASS(pI830)) + memsize = MB(128) - KB(range); + break; + case G33_GMCH_GMS_STOLEN_256M: + if (IS_G33CLASS(pI830)) + memsize = MB(256) - KB(range); + break; } } else { switch (gmch_ctrl & I830_GMCH_GMS_MASK) { @@ -1046,6 +1073,15 @@ I830PreInit(ScrnInfoPtr pScrn, int flags case PCI_CHIP_I965_GM: chipname = "965GM"; break; + case PCI_CHIP_G33_G: + chipname = "G33"; + break; + case PCI_CHIP_Q35_G: + chipname = "Q35"; + break; + case PCI_CHIP_Q33_G: + chipname = "Q33"; + break; default: chipname = "unknown chipset"; break; @@ -1400,7 +1436,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags else pI830->CursorNeedsPhysical = FALSE; - if (IS_I965G(pI830)) + if (IS_I965G(pI830) || IS_G33CLASS(pI830)) pI830->CursorNeedsPhysical = FALSE; /* diff -uNp src.old/i830_exa.c src/i830_exa.c --- src.old/i830_exa.c 2007-04-19 13:43:11.000000000 -0500 +++ src/i830_exa.c 2007-07-03 02:05:26.000000000 -0500 @@ -493,7 +493,7 @@ I830EXAInit(ScreenPtr pScreen) pI830->EXADriverPtr->Composite = i830_composite; pI830->EXADriverPtr->DoneComposite = i830_done_composite; } else if (IS_I915G(pI830) || IS_I915GM(pI830) || - IS_I945G(pI830) || IS_I945GM(pI830)) + IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) { pI830->EXADriverPtr->CheckComposite = i915_check_composite; pI830->EXADriverPtr->PrepareComposite = i915_prepare_composite; diff -uNp src.old/i830.h src/i830.h --- src.old/i830.h 2007-04-19 15:37:56.000000000 -0500 +++ src/i830.h 2007-07-03 02:05:26.000000000 -0500 @@ -312,6 +312,7 @@ typedef struct _I830Rec { i830_memory *depth_buffer; i830_memory *textures; /**< Compatibility texture memory */ i830_memory *memory_manager; /**< DRI memory manager aperture */ + i830_memory *hw_status; int TexGranularity; int drmMinor; diff -uNp src.old/i830_memory.c src/i830_memory.c --- src.old/i830_memory.c 2007-04-19 15:39:16.000000000 -0500 +++ src/i830_memory.c 2007-07-03 02:05:26.000000000 -0500 @@ -1213,6 +1213,22 @@ i830_allocate_texture_memory(ScrnInfoPtr return TRUE; } +static Bool +i830_allocate_hwstatus(ScrnInfoPtr pScrn) +{ +#define HWSTATUS_PAGE_SIZE (4*1024) + I830Ptr pI830 = I830PTR(pScrn); + + pI830->hw_status = i830_allocate_memory(pScrn, "G33 hw status", + HWSTATUS_PAGE_SIZE, GTT_PAGE_SIZE, 0); + if (pI830->hw_status == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Failed to allocate hw status page for G33.\n"); + return FALSE; + } + return TRUE; +} + Bool i830_allocate_3d_memory(ScrnInfoPtr pScrn) { @@ -1220,6 +1236,11 @@ i830_allocate_3d_memory(ScrnInfoPtr pScr DPRINTF(PFX, "i830_allocate_3d_memory\n"); + if (IS_G33CLASS(pI830)) { + if (!i830_allocate_hwstatus(pScrn)) + return FALSE; + } + if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, &pI830->back_tiled, "back buffer")) return FALSE; diff -uNp src.old/i830_video.c src/i830_video.c --- src.old/i830_video.c 2007-04-19 17:30:01.000000000 -0500 +++ src/i830_video.c 2007-07-03 02:05:26.000000000 -0500 @@ -472,7 +472,7 @@ I830InitVideo(ScreenPtr pScreen) } /* Set up overlay video if we can do it at this depth. */ - if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8 && + if (!IS_I965G(pI830) && !IS_G33CLASS(pI830) && pScrn->bitsPerPixel != 8 && pI830->overlay_regs != NULL) { overlayAdaptor = I830SetupImageVideoOverlay(pScreen);